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Gagan- > I guess better put the TI device as first > CPU in the boundary scan chain. This might help. I > only run homogenous mix of 8 TI DSPs in single chain. > But havn't try on the hetrogenous mix of other CPUs > Other thing is to slow the JTAG clock from 10.xx to > 2.xx Do you know how to slow the JTAG clock with Spectrum Digital XDS510PP emulator? There have been a few times before we wanted to slow the clock for board debug purposes. There is a "Speed" control in the SDConfig setup, but I think that is a host software transfer rate setting. Jeff Brower system engineer Signalogic > --- Arius - Rick Collins <> wrote: > > The JTAG port is used both for debugging software in > > development and for > > boundary scan hardware test in production. Most of > > the PLD vendors provide > > support in their programming software for other > > devices in the scan > > chain. But I have received mixed advice on putting > > TI DSPs in a scan chain > > with other devices. TI has lots of literature > > saying you can do this and > > Code Composer seems to offer support for this. But > > when I asked TI support > > about it, they said they don't advise you to try it, > > but to put the DSP on > > its own JTAG port with no other devices. > > > > Seems TI can't make up its mind about whether or not > > they wish to support > > JTAG for boundary scan. Anyone have any experience > > with this? Have you > > used TI DSPs in a scan chain with other devices such > > as FPGAs and MCUs? > > > > > > Rick Collins > > > > > > > > Arius - A Signal Processing Solutions Company > > Specializing in DSP and FPGA design > > http://www.arius.com > > 4 King Ave > > 301-682-7772 Voice > > Frederick, MD 21701-3110 > > 301-682-7666 FAX |
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Re: [c55x] CC and JTAG with other devices in the scan chain
Started by ●June 3, 2003
Reply by ●June 4, 20032003-06-04
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David- > I think you are correct about the speed issue. I think I've read that it's > actually a delay parameter on the EPP/ECP interface between host PC > the emulator box. > I haven't checked it yet, but isn't there a jumper on the DSK board > configuring the JTAG speed? I'll check as soon as I'm available for that > and get an answer. Thanks. I am hoping to hear that someone knows a way to do this inside the Spectrum Digital XDS510PP emulator, maybe deadbug a part or 2 and add some jumpers to control the clock rate, or similar. The issue for us is we're always bringing up new C5xxx and C6xxx hardware, and JTAG is sometimes a problem, especially TCK signal. For example, we can't always put the JTAG header as close to the DSP chain as we want, we have a lot of high speed noise sources, etc. Jeff Brower system engineer Signalogic > -----Original Message----- > From: Jeff Brower [mailto:] > Sent: Tuesday, June 03, 2003 3:18 PM > To: Gagan Singh > Cc: ; ; > Subject: Re: [c55x] CC and JTAG with other devices in the scan chain > > Gagan- > > > I guess better put the TI device as first > > CPU in the boundary scan chain. This might help. I > > only run homogenous mix of 8 TI DSPs in single chain. > > But havn't try on the hetrogenous mix of other CPUs > > Other thing is to slow the JTAG clock from 10.xx to > > 2.xx > > Do you know how to slow the JTAG clock with Spectrum Digital XDS510PP > emulator? > There have been a few times before we wanted to slow the clock for board > debug > purposes. There is a "Speed" control in the SDConfig setup, but I think > that is a > host software transfer rate setting. > > Jeff Brower > system engineer > Signalogic > > > --- Arius - Rick Collins <> wrote: > > > The JTAG port is used both for debugging software in > > > development and for > > > boundary scan hardware test in production. Most of > > > the PLD vendors provide > > > support in their programming software for other > > > devices in the scan > > > chain. But I have received mixed advice on putting > > > TI DSPs in a scan chain > > > with other devices. TI has lots of literature > > > saying you can do this and > > > Code Composer seems to offer support for this. But > > > when I asked TI support > > > about it, they said they don't advise you to try it, > > > but to put the DSP on > > > its own JTAG port with no other devices. > > > > > > Seems TI can't make up its mind about whether or not > > > they wish to support > > > JTAG for boundary scan. Anyone have any experience > > > with this? Have you > > > used TI DSPs in a scan chain with other devices such > > > as FPGAs and MCUs? > > > > > > > > > Rick Collins > > > > > > > > > > > > Arius - A Signal Processing Solutions Company > > > Specializing in DSP and FPGA design > > > http://www.arius.com > > > 4 King Ave > > > 301-682-7772 Voice > > > Frederick, MD 21701-3110 > > > 301-682-7666 FAX |
Reply by ●June 4, 20032003-06-04
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Gagan- > The JTAG clock freq control is provided > in the POD only. It is for the manufacure to give > some kind of interface to do so. In my case we did > use flexds emulators. They did provided control to > change JTAG clock by jumper settings in the POD > itself. Ok, score one for Flexds emulators, that is an excellent feature. I think I will e-mail the Mike and Danny at Spectrum Digital and see what is their suggestion on how to do it with their units. Jeff Brower system engineer Signalogic > Plus u have to specify the same in ur config file > placed mostly in ..\ti\cc\bin > > Regards > Gagan > > --- Jeff Brower <> wrote: > > Gagan- > > > > > I guess better put the TI device as > > first > > > CPU in the boundary scan chain. This might help. I > > > only run homogenous mix of 8 TI DSPs in single > > chain. > > > But havn't try on the hetrogenous mix of other > > CPUs > > > Other thing is to slow the JTAG clock from 10.xx > > to > > > 2.xx > > > > Do you know how to slow the JTAG clock with Spectrum > > Digital XDS510PP emulator? > > There have been a few times before we wanted to slow > > the clock for board debug > > purposes. There is a "Speed" control in the > > SDConfig setup, but I think that is a > > host software transfer rate setting. > > > > Jeff Brower > > system engineer > > Signalogic > > > > > --- Arius - Rick Collins <> > > wrote: > > > > The JTAG port is used both for debugging > > software in > > > > development and for > > > > boundary scan hardware test in production. Most > > of > > > > the PLD vendors provide > > > > support in their programming software for other > > > > devices in the scan > > > > chain. But I have received mixed advice on > > putting > > > > TI DSPs in a scan chain > > > > with other devices. TI has lots of literature > > > > saying you can do this and > > > > Code Composer seems to offer support for this. > > But > > > > when I asked TI support > > > > about it, they said they don't advise you to try > > it, > > > > but to put the DSP on > > > > its own JTAG port with no other devices. > > > > > > > > Seems TI can't make up its mind about whether or > > not > > > > they wish to support > > > > JTAG for boundary scan. Anyone have any > > experience > > > > with this? Have you > > > > used TI DSPs in a scan chain with other devices > > such > > > > as FPGAs and MCUs? > > > > > > > > > > > > Rick Collins > > > > > > > > > > > > > > > > Arius - A Signal Processing Solutions Company > > > > Specializing in DSP and FPGA design > > > > http://www.arius.com > > > > 4 King Ave > > > > 301-682-7772 Voice > > > > Frederick, MD 21701-3110 > > > > 301-682-7666 FAX |
