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DSP implementation on an FPGA: Best HDL?

Started by Unknown July 25, 2008
Vladimir Vassilevsky <antispam_bogus@hotmail.com> wrote in news:Fxpik.15359
$xZ.12624@nlpi070.nbdc.sbc.com:

> > > edwarwl@gmail.com wrote: > >> On Jul 25, 11:40 am, Vladimir Vassilevsky <antispam_bo...@hotmail.com> >> wrote: >> >>>edwa...@gmail.com wrote: >>> >>>>I'm beginning a University research project that will be doing some >>>>pretty intense signal processing (a software defined radio, including >>>>a 17-state Extended Kalman Filter) on an FPGA. I would like to ask >>>>anybody with experience in this area to comment on whether VHDL or >>>>Verilog would be an appropriate choice for this DSP design. Is there >>>>much difference in the logic synthesis or ease of programming (for DSP >>>>in particular)? >>> >>>I am about to undertake the serious endeavor: swim across a sea. What >>>color of the swimming pants is the most appropriate? Personally I like >>>red although some people say yellow is better. >>> >>> >>>>My previous experience is with VHDL, so that would be the logical >>>>choice for me if the difference is negligible. >>> >>>>Any other suggestions for starting a DSP project like this? >>> >>>Whatever you do, you will be screwed, that's for sure. >>> >>>Vladimir Vassilevsky >>>DSP and Mixed Signal Design Consultanthttp://www.abvolt.com >> >> >> SDR implementation on an FPGA has been done before, as have multiple- >> state Kalman filters. >> >> Don't assume that you know everything about the project that I've >> described. I think I can do without the consulting services from your >> company. > > Farewell, go ahead and good luck. I've seen many naive folks just that: > "you can do it", "beleive in yourself", "team approach", "positive > thinking" and the other BS like that. When the project will be dropped, > remember my words. > > > Vladimir Vassilevsky > DSP and Mixed Signal Design Consultant > http://www.abvolt.com
Vladimir, Lighten Up! You have no real idea what the OP's experience level is. If I never tried to solve something I hadn't done before, I would never have learned anything -- and neither would you! Skills come from stretching past your comfort level. He asked a reasonable question in the right forum. He isn't asking anyone to solve his homework. Al
On Fri, 25 Jul 2008 09:47:39 -0700 (PDT), cincydsp@gmail.com wrote:

>On Jul 25, 12:13 pm, edwa...@gmail.com wrote: >> I'm beginning a University research project that will be doing some >> pretty intense signal processing (a software defined radio, including >> a 17-state Extended Kalman Filter) on an FPGA. I would like to ask >> anybody with experience in this area to comment on whether VHDL or >> Verilog would be an appropriate choice for this DSP design. Is there >> much difference in the logic synthesis or ease of programming (for DSP >> in particular)? >> >> My previous experience is with VHDL, so that would be the logical >> choice for me if the difference is negligible. >> >> Any other suggestions for starting a DSP project like this? >> >> Thank you, >> Luke > >Six of one, half dozen of another. I don't think there's a huge >difference in ease of programming between the two languages. Use >whichever you're most familiar with; both are well-supported by all of >the programmable-logic vendors. > >That sounds like a pretty ambitious project. Do you have experience >with hardware signal processing implementations? > >Jason
I'd agree that either should work. VHDL seems to have a bit better traction these days, but doing DSP in an FPGA has been done with both for a long time. Most of the work that we do winds up being implemented in HDL with an FPGA target. The tool sets support that quite well, and I don't think there are any real hurdles or disadvantages to that approach for the sort of project you've described. Eric Jacobsen Minister of Algorithms Abineau Communications http://www.ericjacobsen.org Blog: http://www.dsprelated.com/blogs-1/hf/Eric_Jacobsen.php
Al Clark wrote:
> Vladimir Vassilevsky wrote:
(snip)
>>>>edwa...@gmail.com wrote:
>>>>>I'm beginning a University research project that will be doing some >>>>>pretty intense signal processing (a software defined radio, including >>>>>a 17-state Extended Kalman Filter) on an FPGA. I would like to ask >>>>>anybody with experience in this area to comment on whether VHDL or >>>>>Verilog would be an appropriate choice for this DSP design. Is there >>>>>much difference in the logic synthesis or ease of programming (for DSP >>>>>in particular)?
(snip)
>>Farewell, go ahead and good luck. I've seen many naive folks just that: >>"you can do it", "beleive in yourself", "team approach", "positive >>thinking" and the other BS like that. When the project will be dropped, >>remember my words.
(snip)
> You have no real idea what the OP's experience level is. If I never tried > to solve something I hadn't done before, I would never have learned > anything -- and neither would you! Skills come from stretching past your > comfort level.
I am not so sure. If the question was C++ or Java for a software project, would you have a better answer? Actually, in the past verilog was more popular for ASIC work, and VHDL for FPGAs, but I think it is now that either works about as well. The old rule was that C programmers prefer verilog, and others VHDL, which still might be true. Otherwise, it is pretty much personal preference. -- glen
Al Clark wrote:
> Vladimir Vassilevsky <antispam_bogus@hotmail.com> wrote in news:Fxpik.15359 > $xZ.12624@nlpi070.nbdc.sbc.com: > >> >> edwarwl@gmail.com wrote: >> >>> On Jul 25, 11:40 am, Vladimir Vassilevsky <antispam_bo...@hotmail.com> >>> wrote: >>> >>>> edwa...@gmail.com wrote: >>>> >>>>> I'm beginning a University research project that will be doing some >>>>> pretty intense signal processing (a software defined radio, including >>>>> a 17-state Extended Kalman Filter) on an FPGA. I would like to ask >>>>> anybody with experience in this area to comment on whether VHDL or >>>>> Verilog would be an appropriate choice for this DSP design. Is there >>>>> much difference in the logic synthesis or ease of programming (for DSP >>>>> in particular)? >>>> I am about to undertake the serious endeavor: swim across a sea. What >>>> color of the swimming pants is the most appropriate? Personally I like >>>> red although some people say yellow is better. >>>> >>>> >>>>> My previous experience is with VHDL, so that would be the logical >>>>> choice for me if the difference is negligible. >>>>> Any other suggestions for starting a DSP project like this? >>>> Whatever you do, you will be screwed, that's for sure. >>>> >>>> Vladimir Vassilevsky >>>> DSP and Mixed Signal Design Consultanthttp://www.abvolt.com >>> >>> SDR implementation on an FPGA has been done before, as have multiple- >>> state Kalman filters. >>> >>> Don't assume that you know everything about the project that I've >>> described. I think I can do without the consulting services from your >>> company. >> Farewell, go ahead and good luck. I've seen many naive folks just that: >> "you can do it", "beleive in yourself", "team approach", "positive >> thinking" and the other BS like that. When the project will be dropped, >> remember my words. >> >> >> Vladimir Vassilevsky >> DSP and Mixed Signal Design Consultant >> http://www.abvolt.com > > > Vladimir, Lighten Up! > > You have no real idea what the OP's experience level is. If I never tried > to solve something I hadn't done before, I would never have learned > anything -- and neither would you! Skills come from stretching past your > comfort level. > > He asked a reasonable question in the right forum. He isn't asking anyone > to solve his homework.
Al, What preliminary work do you think gave him to know that his extended Kalman filter needs 17 states, not 15 or 19. An undertaking like his is hampered by unfounded preconceptions. I wish him well. Jerry -- Engineering is the art of making what you want from things you can get. &#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;
edwarwl@gmail.com wrote:

   ...

> I wish I had hardware DSP experience, but no, I don't. Fortunately > though, my background in VHDL is pretty solid, the DSP algorithms have > already been developed, we have very good contacts with some of the > leading researchers doing SDR's, and we have at least two years to > work on it. Plus, what I described was the final step in a multiple- > step process. I just needed some advice on a few things before I get > started.
I repeat: good luck. It seems that 17 states may well be a good start. Jerry -- Engineering is the art of making what you want from things you can get. &#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;
Hi Luke,

            Using Tools like Xilinx System Generator may be a better
option than starting on Scratch from VHDL, if your project doesn't
insist on using VHDL.

 
regards

 
Rudheesh Raghav

On Jul 25, 9:13&#4294967295;pm, edwa...@gmail.com wrote:
> I'm beginning a University research project that will be doing some > pretty intense signal processing (a software defined radio, including > a 17-state Extended Kalman Filter) on an FPGA. I would like to ask > anybody with experience in this area to comment on whether VHDL or > Verilog would be an appropriate choice for this DSP design. Is there > much difference in the logic synthesis or ease of programming (for DSP > in particular)? > > My previous experience is with VHDL, so that would be the logical > choice for me if the difference is negligible. > > Any other suggestions for starting a DSP project like this? > > Thank you, > Luke
"glen herrmannsfeldt" <gah@ugcs.caltech.edu> wrote in message 
news:atWdnTSA6_qd5RfVnZ2dnUVZ_gOdnZ2d@comcast.com...
> Al Clark wrote: >> Vladimir Vassilevsky wrote: > (snip) >>>>>edwa...@gmail.com wrote: > >>>>>>I'm beginning a University research project that will be doing some >>>>>>pretty intense signal processing (a software defined radio, including >>>>>>a 17-state Extended Kalman Filter) on an FPGA. I would like to ask >>>>>>anybody with experience in this area to comment on whether VHDL or >>>>>>Verilog would be an appropriate choice for this DSP design. Is there >>>>>>much difference in the logic synthesis or ease of programming (for DSP >>>>>>in particular)? > (snip) > >>>Farewell, go ahead and good luck. I've seen many naive folks just that: >>>"you can do it", "beleive in yourself", "team approach", "positive >>>thinking" and the other BS like that. When the project will be dropped, >>>remember my words. > (snip) > >> You have no real idea what the OP's experience level is. If I never tried >> to solve something I hadn't done before, I would never have learned >> anything -- and neither would you! Skills come from stretching past your >> comfort level. > > I am not so sure. If the question was C++ or Java for a software > project, would you have a better answer? > > Actually, in the past verilog was more popular for ASIC work, > and VHDL for FPGAs, but I think it is now that either works > about as well. > > The old rule was that C programmers prefer verilog, and others > VHDL, which still might be true. Otherwise, it is pretty much > personal preference.
I agree with that comment. I'm mainly a C and assembler programmer, and I haven't had a lot of experience with either VHDL or Verilog. I was part of a group at my company working on an imaging system using a card with a DSP and FPGA about 3 years ago. We used VHDL, mainly because the board supplier used it for his examples. More recently, I was exploring porting code for a PLD written in ABEL to VHDL. It was a struggle. I tried porting Verilog; much easier. As I understand it VHDL is similar to Ada, and Verilog is similar to C. They will both do the job, it's mostly what you are more comfortable with. Best wishes, --Phil
> > -- glen >