http://www.niktech.com
Hardware Features
� Data Path Width 32 bits
� Most instructions are 16 bit. PC Relative jump instructions are 32 bit.
� Four stage pipeline.
� Von Neumann Architecture (Data and Instruction in the same address space).
� Sixteen, 32 bit General Purpose Registers.
� Four USER defined instructions (with Register File Write back capability).
� Parallel execution of independent Load/Store, Multiply/Shift ,
User Defined Instructions and ALU instructions (In order issue; Out of
order completion)
� Some Conditional Instructions (Reduces branches & increases code density).
� Built in 32 bit Timer.
� Power Down Mode.
� 32x32 Multiplier (Multi cycle execution).
Software Development Tools
� GNU Assembler, Linker (binutils)
� GCC (C Compiler)
� GDB (Debugger) and Instruction Set Simulator
� Standalone C-Library (RedHat newlib)
� Modified version of DietLibc
Size and Performance.
Netlists for the current implementation is available for XILINX Virtex,
Spartan-II and Spartan-IIE; it
utilizes 1375 LUTs (809 slices); the size includes a 32 bit timer and a
32x32 bit LUT based multiplier.
The design has been tested to operate at 60MHZ on a Spartan-II (speed
grade -6).
Netlists, Documentation and Development tools can be downloaded from
http://www.niktech.com.
ANN: Introducing MANIK - a 32 bit Soft-Core RISC Processor
Started by ●October 15, 2004
Reply by ●October 15, 20042004-10-15
Hi Sandeep, I guess it would fit into an Spartan-3 XC3S200, right? I'd like to test it with this FPGA. How can we do that? (I see that there are synthesized netlists on Niktech's website). Regards, -- Jaime Andr�s Aranguren Cardona jaac@nospam.sanjaac.com SanJaaC Electronics Soluciones en DSP www.sanjaac.com (Remove "nospam" from e-mail address) "Sandeep Dutta" <webmaster@niktech.com> escribi� en el mensaje news:p4qdnZwCAqt4nu3cRVn-2Q@comcast.com...> http://www.niktech.com > > Hardware Features > > � Data Path Width 32 bits > � Most instructions are 16 bit. PC Relative jump instructions are 32 bit. > � Four stage pipeline. > � Von Neumann Architecture (Data and Instruction in the same addressspace).> � Sixteen, 32 bit General Purpose Registers. > � Four USER defined instructions (with Register File Write backcapability).> � Parallel execution of independent Load/Store, Multiply/Shift , > User Defined Instructions and ALU instructions (In order issue; Outof> order completion) > � Some Conditional Instructions (Reduces branches & increases codedensity).> � Built in 32 bit Timer. > � Power Down Mode. > � 32x32 Multiplier (Multi cycle execution). > > Software Development Tools > � GNU Assembler, Linker (binutils) > � GCC (C Compiler) > � GDB (Debugger) and Instruction Set Simulator > � Standalone C-Library (RedHat newlib) > � Modified version of DietLibc > > Size and Performance. > > Netlists for the current implementation is available for XILINX Virtex, > Spartan-II and Spartan-IIE; it > utilizes 1375 LUTs (809 slices); the size includes a 32 bit timer and a > 32x32 bit LUT based multiplier. > > The design has been tested to operate at 60MHZ on a Spartan-II (speed > grade -6). > > Netlists, Documentation and Development tools can be downloaded from > http://www.niktech.com. > >
Reply by ●October 16, 20042004-10-16
> Netlists, Documentation and Development tools can be downloaded from > http://www.niktech.com.1) are you going to release the HDL sources? 2) are you planning to port uClinux for MANIK? Antti
Reply by ●October 18, 20042004-10-18
>http://www.niktech.com > >Hardware Features > > .. >Software Development Tools >� GNU Assembler, Linker (binutils) >� GCC (C Compiler) >� GDB (Debugger) and Instruction Set Simulator >� Standalone C-Library (RedHat newlib) >� Modified version of DietLibcThe GCC - link seems to be broken ... -- 42Bastian Do not email to bastian42@yahoo.com, it's a spam-only account :-) Use <same-name>@epost.de instead !
Reply by ●October 18, 20042004-10-18
"Antti Lukats" <antti@case2000.com> wrote in message news:<ckrbh1$kn7$04$1@news.t-online.com>...> > Netlists, Documentation and Development tools can be downloaded from > > http://www.niktech.com. > > 1) are you going to release the HDL sources?Similarly to you Antti, are you going to be releasing the HDL source for NIOX? Cheers, Jon
Reply by ●October 18, 20042004-10-18
>> The GCC - link seems to be broken ...Thanks a for reporting this problem; It is fixed now. http://www.niktech.com/manik-elf-toolchain.tar.gz>> are you going to release the HDL sources?We currently have no plans of releasing the HDL sources. We do have plans to add more open source Cores to the package.>> are you planning to port uClinux for MANIK?Yes we have plans of porting Operating Systems to the processor; uC/OS and uClinux seem to be good choices for a CPU like MANIK. Sandeep -- ----------------------------------------------------------------- http://www.niktech.com Specializing in FPGA based Processors -----------------------------------------------------------------
Reply by ●October 18, 20042004-10-18
"Jaime Andr�s Aranguren Cardona" <jaac@nospam.sanjaac.com> writes:> I guess it would fit into an Spartan-3 XC3S200, right? I'd like to test it > with this FPGA. How can we do that? (I see that there are synthesized > netlists on Niktech's website).Why bother? There are comparable cores available that fit in an XC3S200, and for which you get HDL source code, not just a netlist. I completely fail to understand what MANIK brings to the party.
Reply by ●October 18, 20042004-10-18
"Jon Beniston" <jon@beniston.com> wrote in message news:e87b9ce8.0410180542.cf7be60@posting.google.com...> "Antti Lukats" <antti@case2000.com> wrote in messagenews:<ckrbh1$kn7$04$1@news.t-online.com>...> > > Netlists, Documentation and Development tools can be downloaded from > > > http://www.niktech.com. > > > > 1) are you going to release the HDL sources? > > Similarly to you Antti, are you going to be releasing the HDL source forNIOX?> > Cheers, > JonHi Jon, lets put it that way, NIOX sources are obtainable ;) Antti
Reply by ●October 19, 20042004-10-19
> I completely fail to understand what MANIK brings to the party.An excellent question ; at the risk of staring a flame war I will say "code size". Now, does "code size" matter ? It depends on a lot of factors, but given the small amounts of BLOCKRAMs available on a FPGA, it would matter in "most" cases, especially if the code size saving is substantial. I have done a comparison with MIPS and to eliminate different libraries I have compared the sizes of the individual object files. Note the MANIK tool chain merges text and data section into text section. In both cases the sizes of the uninitialized global variables are not listed (size command does not display it). ----------------------------------------------------------------------- Dhrystone (complied with -O2) MIPS text data bss dec hex filename 1363 26 0 1389 56d dhry21a.o 620 0 0 620 26c dhry21b.o MANIK text data bss dec hex filename 919 0 0 919 397 dhry21a.o 416 0 0 416 1a0 dhry21b.o While code size is the strongest suite of MANIK; it does have other goodies; ability to execute multiple instructions simultaneously; power down mode, built in timer; are just a few of them. Following is a file by file comparison of a benchmark (099.go) from the SPEC95 suite (Does not have any uninitialzed globals) . How much will you save ? Give it a try with the MANIK toolchain ..... ------------------------------------------------------------------------- Files of 099.go (from SPEC95 benchmark) ------------------------------------------------------------------------- MIPS text data bss dec hex filename 3170 863 0 4033 fc1 g2.o 7824 0 0 7824 1e90 g22.o 69236 880 0 70116 111e4 g23.o 64318 1440 0 65758 100de g25.o 3448 0 0 3448 d78 g26.o 6804 8 0 6812 1a9c g27a.o 2596 224 0 2820 b04 g27b.o 11976 0 0 11976 2ec8 g28.o 27616 0 0 27616 6be0 g29.o 19600 1100 0 20700 50dc g2eye.o 0 49784 0 49784 c278 g2jlib2.o 7488 12 0 7500 1d4c g2jos.o 2760 0 0 2760 ac8 g2list.o 6803 5260 0 12063 2f1f g2reas.o 12372 0 0 12372 3054 g2s2.o 4730 4 0 4734 127e g2s3.o 29600 14484 0 44084 ac34 g2shp.o MANIK text data bss dec hex filename 3258 0 0 3258 cba g2.o 5232 0 0 5232 1470 g22.o 46320 0 0 46320 b4f0 g23.o 42522 0 0 42522 a61a g25.o 2220 0 0 2220 8ac g26.o 4480 0 0 4480 1180 g27a.o 1776 0 0 1776 6f0 g27b.o 7716 0 0 7716 1e24 g28.o 17784 0 0 17784 4578 g29.o 13660 0 0 13660 355c g2eye.o 49784 0 0 49784 c278 g2jlib2.o 4860 0 0 4860 12fc g2jos.o 1928 0 0 1928 788 g2list.o 12064 0 0 12064 2f20 g2reas.o 8268 0 0 8268 204c g2s2.o 3874 0 0 3874 f22 g2s3.o 33712 0 0 33712 83b0 g2shp.o [ -- ----------------------------------------------------------------- http://www.niktech.com Specializing in FPGA based Processors -----------------------------------------------------------------
Reply by ●October 19, 20042004-10-19
>Yes we have plans of porting Operating Systems to the processor; >uC/OS and uClinux seem to be good choices for a CPU like >MANIK.Sciopta (the company I work for) should be easyly ported. (If code-size and speed matters :-) A reason why I downloaded the GCC :-) -- 42Bastian Do not email to bastian42@yahoo.com, it's a spam-only account :-) Use <same-name>@epost.de instead !
