Hi all, I've been toying with the idea of replacing an analog control system of mine with a digital version. I've been looking for a good way to find the DC offset of a signal digitally. How do we calculate DC offsets these days? I'll be working in an FPGA, so I will have plenty of parallel logic to burn through. I've been thinking of using some kind of FFT system and then grabbing the DC coefficient, but I don't know much about windowing or what I need to watch out for. I'd appreciate the insight of this group! You guys are much better at this stuff than me. :)
DC offset (finding it, not removing it!)
Started by ●February 12, 2009
Reply by ●February 12, 20092009-02-12
On 12 Feb, 08:14, "nrclark" <nicholas.cl...@gmail.com> wrote:> Hi all, > > I've been toying with the idea of replacing an analog control system of > mine with a digital version. I've been looking for a good way to find the > DC offset of a signal digitally. > > How do we calculate DC offsets these days? > > I'll be working in an FPGA, so I will have plenty of parallel logic to > burn through. I've been thinking of using some kind of FFT system and then > grabbing the DC coefficient, but I don't know much about windowing or what > I need to watch out for. > > I'd appreciate the insight of this group! You guys are much better at this > stuff than me. :)If you only look for the DC component, then the FFT is total overkill. I'd try something like a recursive integrator along the lines of [*]: DC[0] = x[0] DC[1] = 1/2(x[0]+x[1]) DC[n] = (n-1)/n * DC[n-1]+x[n]/n n = 2,... Except for numerical accuracy issues (which might well kill this approach), this is the average of all samples observed thus far, which is the definition of DC. Another method might be to integrate over a sliding frame of length N (which is what you would get from the FFT anyway). After an initialization you get end up with something like [*] DC[n] = DC[n-1] - x[n-N] + x[n] Here it is easier to keep the numerics in check, but you only have an approximation to the true DC component. Rune [*] I'm writing off the top of my head so there are no guarantees that the scaling factors and indexes are correct. Maybe the formulas are correct as is; maybe they work if you start from index 1 instead of 0; maybe there are blunders in there. But the idea is valid.
Reply by ●February 12, 20092009-02-12
>Hi all, > >I've been toying with the idea of replacing an analog control system of >mine with a digital version. I've been looking for a good way to findthe>DC offset of a signal digitally. > >How do we calculate DC offsets these days? > >I'll be working in an FPGA, so I will have plenty of parallel logic to >burn through. I've been thinking of using some kind of FFT system andthen>grabbing the DC coefficient, but I don't know much about windowing orwhat>I need to watch out for. > >I'd appreciate the insight of this group! You guys are much better atthis>stuff than me. :)Expressed in C an efficient noise shaped DC estimator, that is very simple in hardware, looks something like: int32_t dc_state; int16_t sample; dc_state += ((((int32_t) sample << 15) - dc_state) >> 14); As you pump samples through that expression "dc_state" will settle to a fixed point value with the fractional point in the middle (i.e. the top 16 bits will be the integer part of the DC estimate). The value "14" in that expression can be tuned to your needs. A smaller value means the answer will settle faster, but the cutoff frequency of the estimator will be higher. A larger value (probably with a longer register) will settle slower, but have a lower cutoff frequency. If you need reasonably fast settling and a really low cutoff frequency you may need a more complex estimator. The above estimator is a single pole one. More poles will cut off faster. Steve
Reply by ●February 12, 20092009-02-12
nrclark wrote:> Hi all, > > I've been toying with the idea of replacing an analog control system of > mine with a digital version. I've been looking for a good way to find the > DC offset of a signal digitally. > > How do we calculate DC offsets these days? > > I'll be working in an FPGA, so I will have plenty of parallel logic to > burn through. I've been thinking of using some kind of FFT system and then > grabbing the DC coefficient, but I don't know much about windowing or what > I need to watch out for. > > I'd appreciate the insight of this group! You guys are much better at this > stuff than me. :)Your offset isn't true DC. If it were, once you found it, you could save it for all time. I imagine that your analog circuit accumulates the offset on a capacitor and allows it to leak off through a resistor. (Do you remember the grid leak that novices were advised to put a bucket under?) That's a one-pole filter, also called a leaky integrator. BTW, even though you don't want to block the offset, a DC blocker should also let you measure it. There is likely food for thought at http://www.dspguru.com/comp.dsp/tricks/alg/dc_block.htm Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
Reply by ●February 12, 20092009-02-12
On Feb 12, 2:14�am, "nrclark" <nicholas.cl...@gmail.com> wrote:> Hi all, > > I've been toying with the idea of replacing an analog control system of > mine with a digital version. I've been looking for a good way to find the > DC offset of a signal digitally. > > How do we calculate DC offsets these days? > > I'll be working in an FPGA, so I will have plenty of parallel logic to > burn through. I've been thinking of using some kind of FFT system and then > grabbing the DC coefficient, but I don't know much about windowing or what > I need to watch out for. > > I'd appreciate the insight of this group! You guys are much better at this > stuff than me. :)DC component of the FFT is just a single point DFT at zero frequency, which is just the signal average
Reply by ●February 12, 20092009-02-12
On Feb 12, 2:14�am, "nrclark" <nicholas.cl...@gmail.com> wrote:> Hi all, > > I've been toying with the idea of replacing an analog control system of > mine with a digital version. I've been looking for a good way to find the > DC offset of a signal digitally. > > How do we calculate DC offsets these days? > > I'll be working in an FPGA, so I will have plenty of parallel logic to > burn through. I've been thinking of using some kind of FFT system and then > grabbing the DC coefficient, but I don't know much about windowing or what > I need to watch out for. > > I'd appreciate the insight of this group! You guys are much better at this > stuff than me. :)As Steve points out, go back to the math of a DFT and set f/w = 0 and see what happens. It's just an average. So just use an averaging filter of some sort. You probably want to calculate this over some window since your , so either a finite window or an exponentially decaying running average. Any number of low pass filters will do, depending on how much give/take you have between getting a long term accurate number and adapting to fluctuations over time. Chris
Reply by ●February 12, 20092009-02-12
nrclark wrote:> Hi all, > > I've been toying with the idea of replacing an analog control system of > mine with a digital version. I've been looking for a good way to find the > DC offset of a signal digitally. > > How do we calculate DC offsets these days? > > I'll be working in an FPGA, so I will have plenty of parallel logic to > burn through. I've been thinking of using some kind of FFT system and then > grabbing the DC coefficient, but I don't know much about windowing or what > I need to watch out for. > > I'd appreciate the insight of this group! You guys are much better at this > stuff than me. :)Finding the DC offset with FPGA -> apparent homework question. VLV
Reply by ●February 12, 20092009-02-12
Vladimir Vassilevsky wrote: (big snip)> Finding the DC offset with FPGA -> apparent homework question.In that case, use the FFT and take the first term from the result. (or zeroth term for C programmers.) -- glen
Reply by ●February 12, 20092009-02-12
Glen Herrmannsfeldt wrote:> Vladimir Vassilevsky wrote: > (big snip) > >> Finding the DC offset with FPGA -> apparent homework question. > > In that case, use the FFT and take the first term from the result. > (or zeroth term for C programmers.)Isn't that a roundabout way to fine the arithmetic mean? Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
Reply by ●February 12, 20092009-02-12
Jerry Avins <jya@ieee.org> writes:> Glen Herrmannsfeldt wrote: >> Vladimir Vassilevsky wrote: >> (big snip) >> >>> Finding the DC offset with FPGA -> apparent homework question. >> >> In that case, use the FFT and take the first term from the result. >> (or zeroth term for C programmers.) > > Isn't that a roundabout way to fine the arithmetic mean?Exactly - it's a very expensive way to get an average. -- % Randy Yates % "...the answer lies within your soul %% Fuquay-Varina, NC % 'cause no one knows which side %%% 919-577-9882 % the coin will fall." %%%% <yates@ieee.org> % 'Big Wheels', *Out of the Blue*, ELO http://www.digitalsignallabs.com
