Hi, I m making a simple PID controller with notch filters in Xilinx blocks. it always prompt the following errors for the blocks in my notch filter. if i delete the error block or change the latency to 1, the same error will happen to another block in the notch. Is there a general guideline to determing the latency of each block or is there any other possible causes of this internal error? Thanks a lot Error 0001: Reported by: 'PID/Second-order IIR/AddSub2' Details: An internal error occurred in the Xilinx Blockset Library. Please report this error to Xilinx (http://support.xilinx.com), in as much detail as possible. You may also find immediate help in the Answers Database and other online resources at http://support.xilinx.com. Since it is possible that this internal error resulted from an unhandled usage error in your design, we advise you to carefully check the usage of the block reporting the internal error. If errors persist, we recommend that you restart MATLAB. Error occurred during "Simulation Initialization".
XSG model intermal error
Started by ●June 2, 2009