HILBERT HUANG TRANSFORM

hi
I've a doubt whether there is any possibility to implement HHT on
hardware.Whether it can be implemented on FPGA.Thanks in advance 

On Jul 22, 10:45&#4294967295;am, "NIRMAY" <vidhusai...@yahoo.co.in> wrote:
> hi
> I've a doubt whether there is any possibility to implement HHT on
> hardware.Whether it can be implemented on FPGA.Thanks in advance

Well of course the answer is yes it is possible. The HHT is a
multistep process where the 1st step is iterative. This will be a
large effort on coding this into an FPGA. I would suggest you get this
working well in software before you look at doing it in hardware. I
would thing your FPGA will need to handle a chunk of ram for holding
the sifting results.  You will need a bunch of test vectors to certify
your hardware is working along the way.

Good luck!

Clay

>On Jul 22, 10:45=A0am, "NIRMAY" <vidhusai...@yahoo.co.in> wrote:
>> hi
>> I've a doubt whether there is any possibility to implement HHT on
>> hardware.Whether it can be implemented on FPGA.Thanks in advance
>
>Well of course the answer is yes it is possible. The HHT is a
>multistep process where the 1st step is iterative. This will be a
>large effort on coding this into an FPGA. I would suggest you get this
>working well in software before you look at doing it in hardware. I
>would thing your FPGA will need to handle a chunk of ram for holding
>the sifting results.  You will need a bunch of test vectors to certify
>your hardware is working along the way.
>
>Good luck!
>
>Clay
>

thank's a lot sir 

On Jul 22, 10:45&#4294967295;am, "NIRMAY" <vidhusai...@yahoo.co.in> wrote:
> hi
> I've a doubt whether there is any possibility to implement HHT on
> hardware.Whether it can be implemented on FPGA.Thanks in advance

US Patent 5,983,162 "Computer implemented empirical mode decomposition
method, apparatus and article of manufacture"

You are on the hook for royalties, dude