I'm doing very early planning of a product that will use DSP-based phase locked loop technology. Is there a source for rough planning / tradeoff info that is not math heavy? For example given an input frequency range, I need to estimate achievable noise bandwidth, lock time, etc. Thank you.
Prelim DSP design estimate
Started by ●January 23, 2010
Reply by ●January 23, 20102010-01-23
PalapaGuy wrote:> I'm doing very early planning of a product that will use DSP-based phase > locked loop technology. Is there a source for rough planning / tradeoff > info that is not math heavy? For example given an input frequency range, I > need to estimate achievable noise bandwidth, lock time, etc.It's all in your textbook. VLV
Reply by ●January 23, 20102010-01-23
On Jan 23, 5:26�pm, "PalapaGuy" <gmwemail-...@yahoo.com> wrote:> I'm doing very early planning of a product that will use DSP-based phase > locked loop technology. �Is there a source for rough planning / tradeoff > info that is not math heavy? �For example given an input frequency range, I > need to estimate achievable noise bandwidth, lock time, etc. > > Thank you.Get the 2nd Edition: http://www.amazon.com/Phaselock-Techniques-Floyd-M-Gardner/dp/0471042943
Reply by ●January 24, 20102010-01-24
On Sat, 23 Jan 2010 18:07:13 -0800, John wrote:> On Jan 23, 5:26 pm, "PalapaGuy" <gmwemail-...@yahoo.com> wrote: >> I'm doing very early planning of a product that will use DSP-based >> phase locked loop technology. Is there a source for rough planning / >> tradeoff info that is not math heavy? For example given an input >> frequency range, I need to estimate achievable noise bandwidth, lock >> time, etc. >> >> Thank you. > > Get the 2nd Edition: > > http://www.amazon.com/Phaselock-Techniques-Floyd-M-Gardner/dp/0471042943I also like <<http://www.amazon.com/Phase-Locked-Loop-Circuit-Design-Wolaver/ dp/0136627439/ref=sr_1_2?ie=UTF8&s=books&qid=1264367883&sr=8-2-spell>> But a large part of that is because I took the class from Dr. Wolaver. Note that both of these books only cover analog phase lock loop techniques -- you'll have to extend that to an all-digital loop, although that's not too big of a stretch if you understand digital control system design. -- www.wescottdesign.com
Reply by ●January 24, 20102010-01-24
On Sat, 23 Jan 2010 16:26:06 -0600, PalapaGuy wrote:> I'm doing very early planning of a product that will use DSP-based phase > locked loop technology. Is there a source for rough planning / tradeoff > info that is not math heavy? For example given an input frequency > range, I need to estimate achievable noise bandwidth, lock time, etc. > > Thank you.I don't know if there is a "get out of math free" card for this -- yes, there are some preliminary estimates you can make, but there are so many variables that your estimate is either going to have to be unduly conservative or it's going to have a chance of being inadvertently optimistic. Post more details, though, and someone may be tempted to help you toward a better answer. The short description of the problem is that you're building a control loop, you have a plant that injects noise at various points and you want to filter the incoming signal in a certain way. Knowing all the noise characteristics and the characteristics of the loop you can estimate it's performance. But you're not going to get away from the math -- at best you'll alleviate it somewhat by doing some of the work graphically. -- www.wescottdesign.com
Reply by ●January 24, 20102010-01-24
Tim Wescott wrote:> Note that both of these books only cover analog phase lock loop > techniques -- you'll have to extend that to an all-digital loop, although > that's not too big of a stretch if you understand digital control system > design.You should be careful with digital PLLs. The phase detector is nonlinear thing, and it makes DPLL different from a common digital control system; especially when DPLL is in acquisition mode. Besides the obvious effects of quantization and aliasing, there are also not so obvious things like false locks or limit cycle behavior so the correct lock could never be acquired. Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com
Reply by ●January 24, 20102010-01-24
On Sun, 24 Jan 2010 15:59:03 -0600, Vladimir Vassilevsky wrote:> Tim Wescott wrote: > > >> Note that both of these books only cover analog phase lock loop >> techniques -- you'll have to extend that to an all-digital loop, >> although that's not too big of a stretch if you understand digital >> control system design. > > You should be careful with digital PLLs. The phase detector is nonlinear > thing, and it makes DPLL different from a common digital control > system; especially when DPLL is in acquisition mode. Besides the obvious > effects of quantization and aliasing, there are also not so obvious > things like false locks or limit cycle behavior so the correct lock > could never be acquired.OTOH, depending on the signal you're trying to lock to there are some more or less clever things you can do with the phase detector to improve acquisition. Mind your P's and Q's as you point out, and you may find that the result is far better than what you could easily do with an analog circuit. -- www.wescottdesign.com
Reply by ●January 25, 20102010-01-25
Hi guys, I would be very interested in getting some details regarding the "clever things" mentioned below. Could you provide any pointers for reading material, books, papers, whatever. By the way, I own a copy of Tim's book - unfortunately there were no PLL examples in there. Thanks in advance, Ljubisa On Jan 24, 5:57�pm, Tim Wescott <t...@seemywebsite.com> wrote:> On Sun, 24 Jan 2010 15:59:03 -0600, Vladimir Vassilevsky wrote: > > Tim Wescott wrote: > > >> Note that both of these books only cover analog phase lock loop > >> techniques -- you'll have to extend that to an all-digital loop, > >> although that's not too big of a stretch if you understand digital > >> control system design. > > > You should be careful with digital PLLs. The phase detector is nonlinear > > � thing, and it makes DPLL different from a common digital control > > system; especially when DPLL is in acquisition mode. Besides the obvious > > effects of quantization and aliasing, there are also not so obvious > > things like false locks or limit cycle behavior so the correct lock > > could never be acquired. > > OTOH, depending on the signal you're trying to lock to there are some > more or less clever things you can do with the phase detector to improve > acquisition. �Mind your P's and Q's as you point out, and you may find > that the result is far better than what you could easily do with an > analog circuit. > > --www.wescottdesign.com
Reply by ●January 26, 20102010-01-26
Hi guys, Just a follow-up. In particular, I am interested in how to implement the transition between the non-linear acquisition mode and linear phase detection mode if one implements a two step locking process: 1. Lock frequency based on a binary up/down frequency indicator. 2. Once frequency is locked switch to linear phase-only detection mode (equivalent of an xor phase detector, suffers from problems with cycle- slipping, this the initial frequency locking). Thanks for any responses. Ljubisa On Jan 25, 10:14�pm, eternal_nan <eternal....@gmail.com> wrote:> Hi guys, > > I would be very interested in getting some details regarding the > "clever things" mentioned below. Could you provide any pointers for > reading material, books, papers, whatever. By the way, I own a copy of > Tim's book - unfortunately there were no PLL examples in there. > > Thanks in advance, > Ljubisa > > On Jan 24, 5:57�pm, Tim Wescott <t...@seemywebsite.com> wrote: > > > > > On Sun, 24 Jan 2010 15:59:03 -0600, Vladimir Vassilevsky wrote: > > > Tim Wescott wrote: > > > >> Note that both of these books only cover analog phase lock loop > > >> techniques -- you'll have to extend that to an all-digital loop, > > >> although that's not too big of a stretch if you understand digital > > >> control system design. > > > > You should be careful with digital PLLs. The phase detector is nonlinear > > > � thing, and it makes DPLL different from a common digital control > > > system; especially when DPLL is in acquisition mode. Besides the obvious > > > effects of quantization and aliasing, there are also not so obvious > > > things like false locks or limit cycle behavior so the correct lock > > > could never be acquired. > > > OTOH, depending on the signal you're trying to lock to there are some > > more or less clever things you can do with the phase detector to improve > > acquisition. �Mind your P's and Q's as you point out, and you may find > > that the result is far better than what you could easily do with an > > analog circuit. > > > --www.wescottdesign.com
Reply by ●January 26, 20102010-01-26
On Mon, 25 Jan 2010 19:14:32 -0800, eternal_nan wrote: (top posting fixed)> On Jan 24, 5:57 pm, Tim Wescott <t...@seemywebsite.com> wrote: >> On Sun, 24 Jan 2010 15:59:03 -0600, Vladimir Vassilevsky wrote: >> > Tim Wescott wrote: >> >> >> Note that both of these books only cover analog phase lock loop >> >> techniques -- you'll have to extend that to an all-digital loop, >> >> although that's not too big of a stretch if you understand digital >> >> control system design. >> >> > You should be careful with digital PLLs. The phase detector is >> > nonlinear >> > thing, and it makes DPLL different from a common digital control >> > system; especially when DPLL is in acquisition mode. Besides the >> > obvious effects of quantization and aliasing, there are also not so >> > obvious things like false locks or limit cycle behavior so the >> > correct lock could never be acquired. >> >> OTOH, depending on the signal you're trying to lock to there are some >> more or less clever things you can do with the phase detector to >> improve acquisition. Mind your P's and Q's as you point out, and you >> may find that the result is far better than what you could easily do >> with an analog circuit. >> > Hi guys, > > I would be very interested in getting some details regarding the "clever > things" mentioned below. Could you provide any pointers for reading > material, books, papers, whatever. By the way, I own a copy of Tim's > book - unfortunately there were no PLL examples in there. > > Thanks in advance, > Ljubisa >I need to write a DPLL primer; I haven't in part because there are so many different applications, I haven't had time to categorize them and sort them -- and that's not even addressing alternative synchronization methods that make PLL's unnecessary. If you understand the control theory part, getting a book or two on analog PLL design is a huge help -- all the elements are there in both digital and analog loops, so an analog PLL book is a great help. Floyd Gardener's book comes well recommended. I like Dan Wolaver's book "Phase Locked Loop Circuit Design", but I haven't gotten Gardener's book to compare with it. -- www.wescottdesign.com
