On Wed, 12 May 2010 20:25:06 -0400, Jerry Avins <jya@ieee.org> wrote:>Some so-called phase-locked loops are actually frequency locked. The >classic XOR detector develops a duty cycle that reflects the difference >between the reference frequency and the LO's natural frequency. The duty >cycle, in turn, is a measure of the phase error.I'm having a little trouble getting my head around this. If the XOR detector duty cycle represents frequency difference, then wouldn't the *integral* of the duty cycle represent the phase error? And what would the integral of a duty cycle look like? Greg
Phase/Amplitude detector in PLL
Started by ●May 12, 2010
Reply by ●May 13, 20102010-05-13
Reply by ●May 13, 20102010-05-13
On Wed, 12 May 2010 19:35:16 -0500, Vladimir Vassilevsky <nospam@nowhere.com> wrote:>Frequency locked loops are actually used quite often; you only have to >lock the derivative of phase rather then phase. This decreases the order >of the system by one. The dynamics is simpler then that of PLL. However, >frequency is relative whereas phase is absolute; so there is 3dB loss in >loop SNR. At low SNRs, there will be nasty threshold behavior. There are >also mixed mode loops with phase and frequency feedbacks.Thanks, Vladimir. I've never used a "FLL", and never even seen one mentioned in the literature. But I admit, I'm a little out of my element here. Greg
Reply by ●May 13, 20102010-05-13
On May 12, 6:31�pm, Vladimir Vassilevsky <nos...@nowhere.com> wrote:> In the classic treatises on PLL, they consider phase detectors as purely > phase detectors, i.e. devices which output the phase of the signal > regardless of the instant magnitude of the signal. I wonder if there > could be possible to improve the SNR of the PLL by considering the > magnitude also. Do you know a book or article which talks about that? > > VLVJust a thought: don't some phase detectors that are often used have some degree of this built-in? One example I'm thinking of is a Costas loop where you might use I*Q as the phase error. If you scale the amplitude of the received signal, that scale factor (squared) is applied directly to the phase error. Of course, you might be able to squeeze out some more information based on intelligently considering the amplitude (i.e. by using some memory of the recent signal level instead of just on a sample-by-sample basis), but as you already know, many phase detectors already have some bit of amplitude sensitivity. Jason
Reply by ●May 13, 20102010-05-13
On May 13, 8:30�am, Greg Berchin <gberc...@comicast.net.invalid> wrote:> On Wed, 12 May 2010 19:35:16 -0500, Vladimir Vassilevsky <nos...@nowhere.com> > wrote: > > >Frequency locked loops are actually used quite often; you only have to > >lock the derivative of phase rather then phase. This decreases the order > >of the system by one. The dynamics is simpler then that of PLL. However, > >frequency is relative whereas phase is absolute; so there is 3dB loss in > >loop SNR. At low SNRs, there will be nasty threshold behavior. There are > >also mixed mode loops with phase and frequency feedbacks. > > Thanks, Vladimir. �I've never used a "FLL", and never even seen one mentioned in > the literature. �But I admit, I'm a little out of my element here. > > GregOne place where FLLs might be used is in a GPS receiver. In order to make precise Doppler shift and carrier phase measurements used for navigation, a PLL with a small noise bandwidth is desirable. However, such a scheme has poor acquisition characteristics in the presence of unknown frequency offset. During signal acquisition, you can use an FLL (or a wider-bandwidth PLL) for fast acquisition, then transition over to a tracking mode with a low-noise PLL. Jason
Reply by ●May 13, 20102010-05-13
Jason wrote:> On May 12, 6:31 pm, Vladimir Vassilevsky <nos...@nowhere.com> wrote: > >>In the classic treatises on PLL, they consider phase detectors as purely >>phase detectors, i.e. devices which output the phase of the signal >>regardless of the instant magnitude of the signal. I wonder if there >>could be possible to improve the SNR of the PLL by considering the >>magnitude also. Do you know a book or article which talks about that? >> > Just a thought: don't some phase detectors that are often used have > some degree of this built-in? One example I'm thinking of is a Costas > loop where you might use I*Q as the phase error. If you scale the > amplitude of the received signal, that scale factor (squared) is > applied directly to the phase error. Of course, you might be able to > squeeze out some more information based on intelligently considering > the amplitude (i.e. by using some memory of the recent signal level > instead of just on a sample-by-sample basis), but as you already know, > many phase detectors already have some bit of amplitude sensitivity.It is not obvious to me that the built-in sensitivity to the amplitude is anywhere near optimal; it could be detrimental in some cases. Another interesting question is the PLL behaviour during the acquisition. There is clear correlation between the magnitude and the phase errors; the consideration of the amplitude improves the loop by 1..2dB. Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com
Reply by ●May 13, 20102010-05-13
On 5/13/2010 8:28 AM, Greg Berchin wrote:> On Wed, 12 May 2010 20:25:06 -0400, Jerry Avins<jya@ieee.org> wrote: > >> Some so-called phase-locked loops are actually frequency locked. The >> classic XOR detector develops a duty cycle that reflects the difference >> between the reference frequency and the LO's natural frequency. The duty >> cycle, in turn, is a measure of the phase error. > > I'm having a little trouble getting my head around this. If the XOR detector > duty cycle represents frequency difference, then wouldn't the *integral* of the > duty cycle represent the phase error? And what would the integral of a duty > cycle look like?It was late and I put it poorly. (Anyhow, *I* knew what I meant.) If the LO's free-running frequency is the same as the reference, it doesn't need to be pulled to achieve lock. The XOR's duty cycle will be 50%. As the reference moves*, the duty cycle (and hence the average DC) will shift in order to generate the necessary control voltage for the VCO. The frequencies are locked, but their phase offset is proportional to how hard the LO has to be pulled. I.e., the frequency is locked, but the phase is not. Locking phase requires an extra integrator. Jerry __________________________ * In the '50s, before AFC was universal in FM receivers, a listener complained to a station manager that his station drifted. He told her, "Nowadays, you can get a receiver that drifts with the station" and referred her to my shop. -- "I view the progress of science as ... the slow erosion of the tendency to dichotomize." --Barbara Smuts, U. Mich. �����������������������������������������������������������������������
Reply by ●May 13, 20102010-05-13
On 5/12/2010 9:37 PM, Vladimir Vassilevsky wrote:> > > Eric Jacobsen wrote: > >> On 5/12/2010 3:31 PM, Vladimir Vassilevsky wrote: >> >>> >>> In the classic treatises on PLL, they consider phase detectors as purely >>> phase detectors, i.e. devices which output the phase of the signal >>> regardless of the instant magnitude of the signal. I wonder if there >>> could be possible to improve the SNR of the PLL by considering the >>> magnitude also. Do you know a book or article which talks about that? >>> > >> Unless there's information in the magnitude that tells you something >> about the phase, I don't know how it would help if you're really >> trying to lock to the phase of the input signal. >> >> Magnitude and phase are generally orthogonal, so ignoring magnitude >> shouldn't have any effect on performance if the information that >> drives the PLL is in the phase. If that's not true, i.e., if there is >> some information in the magnitude that can affect the loop >> performance, then whatever the nature of that information might be >> would drive the changes to the phase detector. > > OK, I've ran the numbers. At the SNR ~ 1, the gain in the loop jitter > due to processing of the amplitude as well as phase could be ~2dB. > The problem is related to the capacity of the channel, and the result is > what could be expected. > > It is interesting to see that if the noise is Gaussian, then the huge > values of the signal are more likely to be correct. The expected RMS > error is decreasing with magnitude to some asymptotic value. > > > Vladimir Vassilevsky > DSP and Mixed Signal Design Consultant > http://www.abvolt.comI think I see what's happening. It is often easy to exclude undesirable detector samples by setting the output to zero. There are generally not ill effects from excluding occassional input samples unless one starts to approach a limit in jitter tolerance. So it may be effective to just ignore inputs that are below some magnitude theshold. Often this is nearly as good as some optimized algorithm. -- Eric Jacobsen Minister of Algorithms Abineau Communications http://www.abineau.com
Reply by ●May 13, 20102010-05-13
On May 13, 10:31�am, Vladimir Vassilevsky <nos...@nowhere.com> wrote:> In the classic treatises on PLL, they consider phase detectors as purely > phase detectors, i.e. devices which output the phase of the signal > regardless of the instant magnitude of the signal. I wonder if there > could be possible to improve the SNR of the PLL by considering the > magnitude also. Do you know a book or article which talks about that? > > VLVIt will help but only if you have "special" problems with for example FM ie co-cahannel or Multipath interference. However, you don't interfere with the amplitude going into a PLL since this will de-stabilise it and change the tracking properties. You use a separate loop called an Amplitude-Locked Loop instead of a hard limiter first. In this way when the amplitude of the FM goes to zero at any time the ALL responds quickly and servo's out (as much as it can) such changes without amplifying the noise (which a limiter does - a limiter does no filtering of course). Look here. http://www.ampsysltd.co.uk/ Hardy
Reply by ●May 13, 20102010-05-13
On May 13, 6:51�pm, Eric Jacobsen <eric.jacob...@ieee.org> wrote:> On 5/12/2010 9:37 PM, Vladimir Vassilevsky wrote: > > > > > > > Eric Jacobsen wrote: > > >> On 5/12/2010 3:31 PM, Vladimir Vassilevsky wrote: > > >>> In the classic treatises on PLL, they consider phase detectors as purely > >>> phase detectors, i.e. devices which output the phase of the signal > >>> regardless of the instant magnitude of the signal. I wonder if there > >>> could be possible to improve the SNR of the PLL by considering the > >>> magnitude also. Do you know a book or article which talks about that? > > >> Unless there's information in the magnitude that tells you something > >> about the phase, I don't know how it would help if you're really > >> trying to lock to the phase of the input signal. > > >> Magnitude and phase are generally orthogonal, so ignoring magnitude > >> shouldn't have any effect on performance if the information that > >> drives the PLL is in the phase. If that's not true, i.e., if there is > >> some information in the magnitude that can affect the loop > >> performance, then whatever the nature of that information might be > >> would drive the changes to the phase detector. > > > OK, I've ran the numbers. At the SNR ~ 1, the gain in the loop jitter > > due to processing of the amplitude as well as phase could be ~2dB. > > The problem is related to the capacity of the channel, and the result is > > what could be expected. > > > It is interesting to see that if the noise is Gaussian, then the huge > > values of the signal are more likely to be correct. The expected RMS > > error is decreasing with magnitude to some asymptotic value. > > > Vladimir Vassilevsky > > DSP and Mixed Signal Design Consultant > >http://www.abvolt.com > > I think I see what's happening. �It is often easy to exclude undesirable > detector samples by setting the output to zero. �There are generally not > ill effects from excluding occassional input samples unless one starts > to approach a limit in jitter tolerance. �So it may be effective to just > ignore inputs that are below some magnitude theshold. �Often this is > nearly as good as some optimized algorithm. > > -- > Eric Jacobsen > Minister of Algorithms > Abineau Communicationshttp://www.abineau.comYes, this is also often done especially in the convergence-contention algorithms I described earlier. You *bootstrap* your algorithm by some uncool method that you just know to work. This also underscores a broader ideological difference in how you go about doing things; thorough analysis vs. empirical verification. Folks in comp.dsp always make me feel bad about how shallow I seem to be in comparison. It's just that the people I work with live an die by empirical data and don't want you to dig deep in designing anything. The proof is in the pudding they say! Thoroughness is traded for being more varied. -Momo
Reply by ●May 13, 20102010-05-13
On May 14, 12:28�am, Greg Berchin <gberc...@comicast.net.invalid> wrote:> On Wed, 12 May 2010 20:25:06 -0400, Jerry Avins <j...@ieee.org> wrote: > >Some so-called phase-locked loops are actually frequency locked. The > >classic XOR detector develops a duty cycle that reflects the difference > >between the reference frequency and the LO's natural frequency. The duty > >cycle, in turn, is a measure of the phase error. > > I'm having a little trouble getting my head around this. �If the XOR detector > duty cycle represents frequency difference, then wouldn't the *integral* of the > duty cycle represent the phase error? �And what would the integral of a duty > cycle look like? > > GregA phase-locked loop as a phase-locked loop! You get out rate of change of phase of course. If you change the inner dynamics you still get the same output but it will track better or worse. Can't see what the argument is about. Hardy
