Forums

21161 SHARC SIMD questions

Started by Jon Harris February 11, 2004
I have a few questions about SIMD memory accesses on the ADSP-21161N.  It
seems to me the documentation is confusing or incomplete.

1. I am confused about the broadcast load feature.  Referring to the
Hardware Reference page 5-40, it states, "broadcast loading only influences
writes to registers and write identical data to these registers."  But then,
on the next page in Table 5-41, a footnote states "The post increment in the
explicit operation is performed before the implicit instructions are
executed."  This would imply that for example in the instruction r0 =
dm(I1,1), r0 gets the data pointed to by I1 but s0 gets the data pointed to
by I1+1.  Am I confused?

2. Regarding SIMD mode accesses where 2 consecutive 32-bit word are read
from memory, all the examples seem to show this in terms of moving data from
memory to registers.  Does this work the same way when moving data from
registers to memory?  This probably goes without saying, but I wanted to
make sure.

Thanks!
-Jon


"Jon Harris" <goldentully@hotmail.com> wrote in message
news:c0emgb$1686ig$1@ID-210375.news.uni-berlin.de...
> I have a few questions about SIMD memory accesses on the ADSP-21161N. It > seems to me the documentation is confusing or incomplete. > > 1. I am confused about the broadcast load feature. Referring to the > Hardware Reference page 5-40, it states, "broadcast loading only
influences
> writes to registers and write identical data to these registers." But
then,
> on the next page in Table 5-41, a footnote states "The post increment in
the
> explicit operation is performed before the implicit instructions are > executed." This would imply that for example in the instruction r0 = > dm(I1,1), r0 gets the data pointed to by I1 but s0 gets the data pointed
to
> by I1+1. Am I confused?
I'll have to double check with the manual (and maybe my code) but I'm fairly sure what you said is correct. I'm not sure if it works the same way when moving data from registers to memory (I don't think I've used SIMD for this). I do remember that the manual was a little confusing, but writing a small piece of code and running it on the Simulator quickly helped me verify things.
> > 2. Regarding SIMD mode accesses where 2 consecutive 32-bit word are read > from memory, all the examples seem to show this in terms of moving data
from
> memory to registers. Does this work the same way when moving data from > registers to memory? This probably goes without saying, but I wanted to > make sure. > > Thanks! > -Jon > >
Jon Harris wrote:

> I have a few questions about SIMD memory accesses on the ADSP-21161N. It > seems to me the documentation is confusing or incomplete. > > 1. I am confused about the broadcast load feature. Referring to the > Hardware Reference page 5-40, it states, "broadcast loading only influences > writes to registers and write identical data to these registers." But then, > on the next page in Table 5-41, a footnote states "The post increment in the > explicit operation is performed before the implicit instructions are > executed." This would imply that for example in the instruction r0 = > dm(I1,1), r0 gets the data pointed to by I1 but s0 gets the data pointed to > by I1+1. Am I confused?
Don't let yourself be confused. The idea of broadcast loads can be shown with a simple example: Multiply two signals with two gains -> load the two gain values with standard SIMD access. Multiply two signals with one common gain -> load the one gain value with broadcast load. (Obviously, broadcast only works for loading, and not for storing)
> 2. Regarding SIMD mode accesses where 2 consecutive 32-bit word are read > from memory, all the examples seem to show this in terms of moving data from > memory to registers. Does this work the same way when moving data from > registers to memory? This probably goes without saying, but I wanted to > make sure.
Yes. You can both load and store 4 32bit values in one instruction (I love that processor!). It's a pity the SDRAM interface has maximum 48bit width and not 64bits ... Regards, Andor
Good suggestion, Bhaskar.  After spending a few minutes with the Simulator,
I confirmed that broadcast loads put the same data into both registers (and
this only applies to loads, not stores) and SIMD mode accesses work for both
loads and stores.

"Bhaskar Thiagarajan" <bhaskart@deja.com> wrote in message
news:c0eocg$15rqe8$1@ID-82263.news.uni-berlin.de...
> "Jon Harris" <goldentully@hotmail.com> wrote in message > news:c0emgb$1686ig$1@ID-210375.news.uni-berlin.de... > > I have a few questions about SIMD memory accesses on the ADSP-21161N.
It
> > seems to me the documentation is confusing or incomplete. > > > > 1. I am confused about the broadcast load feature. Referring to the > > Hardware Reference page 5-40, it states, "broadcast loading only > influences > > writes to registers and write identical data to these registers." But > then, > > on the next page in Table 5-41, a footnote states "The post increment in > the > > explicit operation is performed before the implicit instructions are > > executed." This would imply that for example in the instruction r0 = > > dm(I1,1), r0 gets the data pointed to by I1 but s0 gets the data pointed > to > > by I1+1. Am I confused? > > I'll have to double check with the manual (and maybe my code) but I'm
fairly
> sure what you said is correct. I'm not sure if it works the same way when > moving data from registers to memory (I don't think I've used SIMD for > this). > I do remember that the manual was a little confusing, but writing a small > piece of code and running it on the Simulator quickly helped me verify > things. > > > > > 2. Regarding SIMD mode accesses where 2 consecutive 32-bit word are read > > from memory, all the examples seem to show this in terms of moving data > from > > memory to registers. Does this work the same way when moving data from > > registers to memory? This probably goes without saying, but I wanted to > > make sure. > > > > Thanks! > > -Jon > > > > > >
"Andor" <an2or@mailcircuit.com> wrote in message
news:ce45f9ed.0402120050.4b65ff0b@posting.google.com...
> Jon Harris wrote: > > > I have a few questions about SIMD memory accesses on the ADSP-21161N.
It
> > seems to me the documentation is confusing or incomplete. > > > > 1. I am confused about the broadcast load feature. Referring to the > > Hardware Reference page 5-40, it states, "broadcast loading only
influences
> > writes to registers and write identical data to these registers." But
then,
> > on the next page in Table 5-41, a footnote states "The post increment in
the
> > explicit operation is performed before the implicit instructions are > > executed." This would imply that for example in the instruction r0 = > > dm(I1,1), r0 gets the data pointed to by I1 but s0 gets the data pointed
to
> > by I1+1. Am I confused? > > Don't let yourself be confused. The idea of broadcast loads can be > shown with a simple example: > > Multiply two signals with two gains -> load the two gain values with > standard SIMD access. > > Multiply two signals with one common gain -> load the one gain value > with broadcast load. > > (Obviously, broadcast only works for loading, and not for storing)
That's what I thought, and confirmed with the Simulator. I will presume that the statement "The post increment in the explicit operation is performed before the implicit instructions are executed." is in error.
"Jon Harris" <goldentully@hotmail.com> wrote in message
news:c0giak$16agnj$1@ID-210375.news.uni-berlin.de...
> "Andor" <an2or@mailcircuit.com> wrote in message > news:ce45f9ed.0402120050.4b65ff0b@posting.google.com... > > Jon Harris wrote: > > > > > I have a few questions about SIMD memory accesses on the ADSP-21161N. > It > > > seems to me the documentation is confusing or incomplete. > > > > > > 1. I am confused about the broadcast load feature. Referring to the > > > Hardware Reference page 5-40, it states, "broadcast loading only > influences > > > writes to registers and write identical data to these registers." But > then, > > > on the next page in Table 5-41, a footnote states "The post increment
in
> the > > > explicit operation is performed before the implicit instructions are > > > executed." This would imply that for example in the instruction r0 = > > > dm(I1,1), r0 gets the data pointed to by I1 but s0 gets the data
pointed
> to > > > by I1+1. Am I confused? > > > > Don't let yourself be confused. The idea of broadcast loads can be > > shown with a simple example: > > > > Multiply two signals with two gains -> load the two gain values with > > standard SIMD access. > > > > Multiply two signals with one common gain -> load the one gain value > > with broadcast load. > > > > (Obviously, broadcast only works for loading, and not for storing) > > That's what I thought, and confirmed with the Simulator. I will presume > that the statement "The post increment in the explicit operation is > performed before the implicit instructions are executed." is in error.
On more careful inspection (I had the 21160 manual) of the correct manual, it does seem to be in error. It should've said *after* instead of 'before'. Cheers Bhaskar
Thanks.

One other question: with SIMD mode on, is there any way to load just a
secondary register without affecting the corresponding primary register?  Or
is the only alternative to turn of SIMD, make the move, then turn back on?
That one cycle effect latency can be a bit of a nuisance sometimes.

"Bhaskar Thiagarajan" <bhaskart@deja.com> wrote in message
news:c0gvbq$15vgis$1@ID-82263.news.uni-berlin.de...
> "Jon Harris" <goldentully@hotmail.com> wrote in message > news:c0giak$16agnj$1@ID-210375.news.uni-berlin.de... > > "Andor" <an2or@mailcircuit.com> wrote in message > > news:ce45f9ed.0402120050.4b65ff0b@posting.google.com... > > > Jon Harris wrote: > > > > > > > I have a few questions about SIMD memory accesses on the
ADSP-21161N.
> > It > > > > seems to me the documentation is confusing or incomplete. > > > > > > > > 1. I am confused about the broadcast load feature. Referring to the > > > > Hardware Reference page 5-40, it states, "broadcast loading only > > influences > > > > writes to registers and write identical data to these registers."
But
> > then, > > > > on the next page in Table 5-41, a footnote states "The post
increment
> in > > the > > > > explicit operation is performed before the implicit instructions are > > > > executed." This would imply that for example in the instruction r0
=
> > > > dm(I1,1), r0 gets the data pointed to by I1 but s0 gets the data > pointed > > to > > > > by I1+1. Am I confused? > > > > > > Don't let yourself be confused. The idea of broadcast loads can be > > > shown with a simple example: > > > > > > Multiply two signals with two gains -> load the two gain values with > > > standard SIMD access. > > > > > > Multiply two signals with one common gain -> load the one gain value > > > with broadcast load. > > > > > > (Obviously, broadcast only works for loading, and not for storing) > > > > That's what I thought, and confirmed with the Simulator. I will presume > > that the statement "The post increment in the explicit operation is > > performed before the implicit instructions are executed." is in error. > > On more careful inspection (I had the 21160 manual) of the correct manual, > it does seem to be in error. It should've said *after* instead of
'before'.
> > Cheers > Bhaskar > > > >
"Jon Harris" <goldentully@hotmail.com> wrote in message
news:c0h2jt$176eng$1@ID-210375.news.uni-berlin.de...
> Thanks. > > One other question: with SIMD mode on, is there any way to load just a > secondary register without affecting the corresponding primary register?
Or
> is the only alternative to turn of SIMD, make the move, then turn back on? > That one cycle effect latency can be a bit of a nuisance sometimes.
If you turn off SIMD, the secondary regs don't get written to (unless you use broadcast loads which work independent of SIMD but always affect both regs). I've had success using this instruction r1 <-> s0 What this does is swap the contents of the regs (not sure if this depends on SIMD on or off). So I guess if you wanted to write to s0 without touching r0 you could use this instruction - is this what you were looking for? Cheers Bhaskar
> > "Bhaskar Thiagarajan" <bhaskart@deja.com> wrote in message > news:c0gvbq$15vgis$1@ID-82263.news.uni-berlin.de... > > "Jon Harris" <goldentully@hotmail.com> wrote in message > > news:c0giak$16agnj$1@ID-210375.news.uni-berlin.de... > > > "Andor" <an2or@mailcircuit.com> wrote in message > > > news:ce45f9ed.0402120050.4b65ff0b@posting.google.com... > > > > Jon Harris wrote: > > > > > > > > > I have a few questions about SIMD memory accesses on the > ADSP-21161N. > > > It > > > > > seems to me the documentation is confusing or incomplete. > > > > > > > > > > 1. I am confused about the broadcast load feature. Referring to
the
> > > > > Hardware Reference page 5-40, it states, "broadcast loading only > > > influences > > > > > writes to registers and write identical data to these registers." > But > > > then, > > > > > on the next page in Table 5-41, a footnote states "The post > increment > > in > > > the > > > > > explicit operation is performed before the implicit instructions
are
> > > > > executed." This would imply that for example in the instruction
r0
> = > > > > > dm(I1,1), r0 gets the data pointed to by I1 but s0 gets the data > > pointed > > > to > > > > > by I1+1. Am I confused? > > > > > > > > Don't let yourself be confused. The idea of broadcast loads can be > > > > shown with a simple example: > > > > > > > > Multiply two signals with two gains -> load the two gain values with > > > > standard SIMD access. > > > > > > > > Multiply two signals with one common gain -> load the one gain value > > > > with broadcast load. > > > > > > > > (Obviously, broadcast only works for loading, and not for storing) > > > > > > That's what I thought, and confirmed with the Simulator. I will
presume
> > > that the statement "The post increment in the explicit operation is > > > performed before the implicit instructions are executed." is in error. > > > > On more careful inspection (I had the 21160 manual) of the correct
manual,
> > it does seem to be in error. It should've said *after* instead of > 'before'. > > > > Cheers > > Bhaskar > > > > > > > > > >
"Bhaskar Thiagarajan" <bhaskart@deja.com> wrote in message
news:c0h917$176urm$1@ID-82263.news.uni-berlin.de...
> "Jon Harris" <goldentully@hotmail.com> wrote in message > news:c0h2jt$176eng$1@ID-210375.news.uni-berlin.de... > > Thanks. > > > > One other question: with SIMD mode on, is there any way to load just a > > secondary register without affecting the corresponding primary register? > Or > > is the only alternative to turn of SIMD, make the move, then turn back
on?
> > That one cycle effect latency can be a bit of a nuisance sometimes. > > If you turn off SIMD, the secondary regs don't get written to (unless you > use broadcast loads which work independent of SIMD but always affect both > regs). > I've had success using this instruction > r1 <-> s0 > What this does is swap the contents of the regs (not sure if this depends
on
> SIMD on or off). > So I guess if you wanted to write to s0 without touching r0 you could use > this instruction - is this what you were looking for? > > Cheers > Bhaskar
After more simulator experiments, here's what I found: 1. With SIMD mode off, you can load just the secondary registers from memory or immediate values without affecting the primaries by using e.g. s0 = 1. 2. With SIMD mode on or off, you can load secondary registers from memory without affecting the primaries using the LW extension. But this will also load a second secondary register. For example, s0 = dm(data) (LW) loads both s0 and s1 but doesn't affect r0 or r1. 3. With SIMD mode on or off, you can load a secondary register from a primary register using the swap instruction, e.g. s0 <-> r1. This also affects r1, but not s0.
"Jon Harris" <goldentully@hotmail.com> wrote in message
news:c0j7v1$s2t2i$1@ID-210375.news.uni-berlin.de...
> "Bhaskar Thiagarajan" <bhaskart@deja.com> wrote in message > news:c0h917$176urm$1@ID-82263.news.uni-berlin.de... > > "Jon Harris" <goldentully@hotmail.com> wrote in message > > news:c0h2jt$176eng$1@ID-210375.news.uni-berlin.de... > > > Thanks. > > > > > > One other question: with SIMD mode on, is there any way to load just a > > > secondary register without affecting the corresponding primary
register?
> > Or > > > is the only alternative to turn of SIMD, make the move, then turn back > on? > > > That one cycle effect latency can be a bit of a nuisance sometimes. > > > > If you turn off SIMD, the secondary regs don't get written to (unless
you
> > use broadcast loads which work independent of SIMD but always affect
both
> > regs). > > I've had success using this instruction > > r1 <-> s0 > > What this does is swap the contents of the regs (not sure if this
depends
> on > > SIMD on or off). > > So I guess if you wanted to write to s0 without touching r0 you could
use
> > this instruction - is this what you were looking for? > > > > Cheers > > Bhaskar > > After more simulator experiments, here's what I found: > > 1. With SIMD mode off, you can load just the secondary registers from
memory
> or immediate values without affecting the primaries by using e.g. s0 = 1. > > 2. With SIMD mode on or off, you can load secondary registers from memory > without affecting the primaries using the LW extension. But this will
also
> load a second secondary register. For example, s0 = dm(data) (LW) loads > both s0 and s1 but doesn't affect r0 or r1. > > 3. With SIMD mode on or off, you can load a secondary register from a > primary register using the swap instruction, e.g. s0 <-> r1. This also > affects r1, but not s0.
That's good to know...thanks for the summary. BTW, the last line should've read "affects r1, but not r0" Cheers Bhaskar