Another QPSK question

Could some DSP guru please clarify the following a bit ?
Suppose that a serial bit stream has to transmitted via
QPSK. At first, the serial bit stream has to be divided into
two - n bits/second to two n/2 bits/second. This can be
done with a serial to parallel converter. Now, the input to
any of the two mixers (for I or Q streams) must be analog,
so that bits need to be passed through a DAC so that the
final analog input to the mixers can take values +/- V volts.
So suppose that a bit '1' has been passed to the DAC for
I channel, and similarly a '1' has been passed to the DAC
for the Q channel - what does the DAC for the Q channel
generate a -V pulse ? Or is it the case that the DAC receives
the number of bits per symbol ?
I am trying to understand the practical details of QPSK,
as compared to what I learnt in my classes. BTW, I work
in firmware and hardware.

On 12/19/2010 11:42 AM, Daku wrote:
> Could some DSP guru please clarify the following a bit ?
> Suppose that a serial bit stream has to transmitted via
> QPSK. At first, the serial bit stream has to be divided into
> two - n bits/second to two n/2 bits/second. This can be
> done with a serial to parallel converter. Now, the input to
> any of the two mixers (for I or Q streams) must be analog,
> so that bits need to be passed through a DAC so that the
> final analog input to the mixers can take values +/- V volts.
> So suppose that a bit '1' has been passed to the DAC for
> I channel, and similarly a '1' has been passed to the DAC
> for the Q channel - what does the DAC for the Q channel
> generate a -V pulse ? Or is it the case that the DAC receives
> the number of bits per symbol ?
> I am trying to understand the practical details of QPSK,
> as compared to what I learnt in my classes. BTW, I work
> in firmware and hardware.

Is this for transmission through a complex or real channel?
-- 
Randy Yates                      % "My Shangri-la has gone away, fading like
Digital Signal Labs              %  the Beatles on 'Hey Jude'"
yates@digitalsignallabs.com      %
http://www.digitalsignallabs.com % 'Shangri-La', *A New World Record*, ELO

On Sun, 19 Dec 2010 08:42:06 -0800, Daku wrote:

> Could some DSP guru please clarify the following a bit ? Suppose that a
> serial bit stream has to transmitted via QPSK. At first, the serial bit
> stream has to be divided into two - n bits/second to two n/2
> bits/second. This can be done with a serial to parallel converter. Now,
> the input to any of the two mixers (for I or Q streams) must be analog,
> so that bits need to be passed through a DAC so that the final analog
> input to the mixers can take values +/- V volts. So suppose that a bit
> '1' has been passed to the DAC for I channel, and similarly a '1' has
> been passed to the DAC for the Q channel - what does the DAC for the Q
> channel generate a -V pulse ? Or is it the case that the DAC receives
> the number of bits per symbol ?
> I am trying to understand the practical details of QPSK, as compared to
> what I learnt in my classes. BTW, I work in firmware and hardware.

There's almost never a real DAC, as in some purpose-designed bit of off-
the-shelf hardware, in the circuit.  All that's necessary is some mixing 
arrangement that passes the carrier through unmolested when a '0' is 
present, and reverses it's phase by 180 degrees when a '1' is present (or 
visa-versa).  You could do this with logic-level output (0V or 3.3V, for 
instance) that gets translated to a positive or negative voltage then 
applied to a mixer; you could do this by generating a logic level pair 
(0V and 3.3V vs. 3.3V and 0V) that drives a balanced mixer directly, or 
you could do it with something as easy as an XOR gate with your data bit 
going into one pin and your carrier into another.

Just to confuse you a bit more, DQPSK is much more common in real life 
than plain old QPSK.  DQPSK differentiates the symbol stream, so that the 
phase will advance an amount proportional to the bit pattern (i.e., not 
at all for 00, +90 for 01, 180 for 10, and -90 for 11).  Using DQPSK 
frees the receiver from needing an absolute phase reference, which makes 
communications oh so much easier* at the loss of a few dB of noise 
performance.

Two sources I can think of for practical knowledge on QPSK are the ARRL 
Handbook (but I just looked at my 2008 edition, and the information is 
disappointingly scant) and my Master's Thesis, which is posted on the web:
http://www.wescottdesign.com/articles/MSK/mskTop.html.  Neither of these 
is a _good_ reference -- they're just the ones that I know off the top of 
my head!

* I have been told by people that have tried that you can attempt to make 
systems that assumes an absolute phase reference, coupled with an error 
correcting code that only works with one alignment of the carrier phase, 
with the whole mess fed back to the carrier reference.  You end up with a 
system that gives you a HUGE burst of errors every time your phase 
reference hiccups, instead of an itty bitty one.

-- 
http://www.wescottdesign.com

On Sun, 19 Dec 2010 11:31:35 -0600, Tim Wescott <tim@seemywebsite.com>
wrote:

>On Sun, 19 Dec 2010 08:42:06 -0800, Daku wrote:
>
>> Could some DSP guru please clarify the following a bit ? Suppose that a
>> serial bit stream has to transmitted via QPSK. At first, the serial bit
>> stream has to be divided into two - n bits/second to two n/2
>> bits/second. This can be done with a serial to parallel converter. Now,
>> the input to any of the two mixers (for I or Q streams) must be analog,
>> so that bits need to be passed through a DAC so that the final analog
>> input to the mixers can take values +/- V volts. So suppose that a bit
>> '1' has been passed to the DAC for I channel, and similarly a '1' has
>> been passed to the DAC for the Q channel - what does the DAC for the Q
>> channel generate a -V pulse ? Or is it the case that the DAC receives
>> the number of bits per symbol ?
>> I am trying to understand the practical details of QPSK, as compared to
>> what I learnt in my classes. BTW, I work in firmware and hardware.

If there are separate DACs for I and Q then they each digitize the I
and Q streams indpendently.   I and Q are orthogonal and independent,
so when they are converted identically by DACs at baseband they
maintain their independence.  They aren't combined until the signal is
mixed up to some IF or RF frequency in the mixer.

It's hard to tell what your question is, but I took a guess.  ;)

>There's almost never a real DAC, as in some purpose-designed bit of off-
>the-shelf hardware, in the circuit.  All that's necessary is some mixing 
>arrangement that passes the carrier through unmolested when a '0' is 
>present, and reverses it's phase by 180 degrees when a '1' is present (or 
>visa-versa).  You could do this with logic-level output (0V or 3.3V, for 
>instance) that gets translated to a positive or negative voltage then 
>applied to a mixer; you could do this by generating a logic level pair 
>(0V and 3.3V vs. 3.3V and 0V) that drives a balanced mixer directly, or 
>you could do it with something as easy as an XOR gate with your data bit 
>going into one pin and your carrier into another.
>
>Just to confuse you a bit more, DQPSK is much more common in real life 
>than plain old QPSK.  DQPSK differentiates the symbol stream, so that the 
>phase will advance an amount proportional to the bit pattern (i.e., not 
>at all for 00, +90 for 01, 180 for 10, and -90 for 11).  Using DQPSK 
>frees the receiver from needing an absolute phase reference, which makes 
>communications oh so much easier* at the loss of a few dB of noise 
>performance.
>
>Two sources I can think of for practical knowledge on QPSK are the ARRL 
>Handbook (but I just looked at my 2008 edition, and the information is 
>disappointingly scant) and my Master's Thesis, which is posted on the web:
>http://www.wescottdesign.com/articles/MSK/mskTop.html.  Neither of these 
>is a _good_ reference -- they're just the ones that I know off the top of 
>my head!
>
>* I have been told by people that have tried that you can attempt to make 
>systems that assumes an absolute phase reference, coupled with an error 
>correcting code that only works with one alignment of the carrier phase, 
>with the whole mess fed back to the carrier reference.  You end up with a 
>system that gives you a HUGE burst of errors every time your phase 
>reference hiccups, instead of an itty bitty one.

This is done routinely in satellite or other low SNR systems where the
1.5dB or so that is lost in differential decoding can't be tolerated.
You just have to build those systems so that phase cycle slips are
infrequent, which is practical.   This works for satellite or other
relatively fixed links where multipath fading is not a dominant
impairment.   We've flown systems like that on helicopters and fast
airplanes with a link to the ground without too much trouble as well.


Eric Jacobsen
Minister of Algorithms
Abineau Communications
http://www.abineau.com

On Sun, 19 Dec 2010 17:47:42 +0000, Eric Jacobsen wrote:

> On Sun, 19 Dec 2010 11:31:35 -0600, Tim Wescott <tim@seemywebsite.com>
> wrote:
> 
>>On Sun, 19 Dec 2010 08:42:06 -0800, Daku wrote:
-- snip --
>>
>>* I have been told by people that have tried that you can attempt to
>>make systems that assumes an absolute phase reference, coupled with an
>>error correcting code that only works with one alignment of the carrier
>>phase, with the whole mess fed back to the carrier reference.  You end
>>up with a system that gives you a HUGE burst of errors every time your
>>phase reference hiccups, instead of an itty bitty one.
> 
> This is done routinely in satellite or other low SNR systems where the
> 1.5dB or so that is lost in differential decoding can't be tolerated.
> You just have to build those systems so that phase cycle slips are
> infrequent, which is practical.   This works for satellite or other
> relatively fixed links where multipath fading is not a dominant
> impairment.   We've flown systems like that on helicopters and fast
> airplanes with a link to the ground without too much trouble as well.
> 

Thanks for that, Eric.  I had been told that tidbit by people who were 
good at writing error-correcting codes, but not good at actually herding 
electrons or even writing so practical an algorithm as a demodulator.  At 
any rate, they were working in an environment with multipath.  So it's 
good to know that this can be done, and when.

-- 
http://www.wescottdesign.com

On Sun, 19 Dec 2010 11:55:31 -0600, Tim Wescott <tim@seemywebsite.com>
wrote:

>On Sun, 19 Dec 2010 17:47:42 +0000, Eric Jacobsen wrote:
>
>> On Sun, 19 Dec 2010 11:31:35 -0600, Tim Wescott <tim@seemywebsite.com>
>> wrote:
>> 
>>>On Sun, 19 Dec 2010 08:42:06 -0800, Daku wrote:
>-- snip --
>>>
>>>* I have been told by people that have tried that you can attempt to
>>>make systems that assumes an absolute phase reference, coupled with an
>>>error correcting code that only works with one alignment of the carrier
>>>phase, with the whole mess fed back to the carrier reference.  You end
>>>up with a system that gives you a HUGE burst of errors every time your
>>>phase reference hiccups, instead of an itty bitty one.
>> 
>> This is done routinely in satellite or other low SNR systems where the
>> 1.5dB or so that is lost in differential decoding can't be tolerated.
>> You just have to build those systems so that phase cycle slips are
>> infrequent, which is practical.   This works for satellite or other
>> relatively fixed links where multipath fading is not a dominant
>> impairment.   We've flown systems like that on helicopters and fast
>> airplanes with a link to the ground without too much trouble as well.
>> 
>
>Thanks for that, Eric.  I had been told that tidbit by people who were 
>good at writing error-correcting codes, but not good at actually herding 
>electrons or even writing so practical an algorithm as a demodulator.  At 
>any rate, they were working in an environment with multipath.  So it's 
>good to know that this can be done, and when.
>
>-- 
>http://www.wescottdesign.com

I should clarify a little;  Multipath by itself is not a problem, but
dynamic fading generally is since it makes it a lot harder to keep the
phase synchronized.   Basically, if the channel is pretty stable it's
not a problem, but if there are perturbations that make phase
synchronization difficult then differential coding is usually the way
to go.




Eric Jacobsen
Minister of Algorithms
Abineau Communications
http://www.abineau.com

STUPIDENT goes to the library and reads an ABC-book:

"Digital communication" by B. Sklar

"Digital communication" by J. Proakis

"Digital communication" by S. Haykin

Either of those books answers a LOT of questions, about QPSK and not 
only about that.

VLV


Daku wrote:

> Could some DSP guru please clarify the following a bit ?
> Suppose that a serial bit stream has to transmitted via
> QPSK. At first, the serial bit stream has to be divided into
> two - n bits/second to two n/2 bits/second. This can be
> done with a serial to parallel converter. Now, the input to
> any of the two mixers (for I or Q streams) must be analog,
> so that bits need to be passed through a DAC so that the
> final analog input to the mixers can take values +/- V volts.
> So suppose that a bit '1' has been passed to the DAC for
> I channel, and similarly a '1' has been passed to the DAC
> for the Q channel - what does the DAC for the Q channel
> generate a -V pulse ? Or is it the case that the DAC receives
> the number of bits per symbol ?
> I am trying to understand the practical details of QPSK,
> as compared to what I learnt in my classes. BTW, I work
> in firmware and hardware.

>
>> Could some DSP guru please clarify the following a bit ?
>> Suppose that a serial bit stream has to transmitted via
>> QPSK. At first, the serial bit stream has to be divided into
>> two - n bits/second to two n/2 bits/second. This can be
>> done with a serial to parallel converter. Now, the input to
>> any of the two mixers (for I or Q streams) must be analog,
>> so that bits need to be passed through a DAC so that the
>> final analog input to the mixers can take values +/- V volts.
>> So suppose that a bit '1' has been passed to the DAC for
>> I channel, and similarly a '1' has been passed to the DAC
>> for the Q channel - what does the DAC for the Q channel
>> generate a -V pulse ? Or is it the case that the DAC receives
>> the number of bits per symbol ?
>> I am trying to understand the practical details of QPSK,
>> as compared to what I learnt in my classes. BTW, I work
>> in firmware and hardware.
>

 "the input to any of the two mixers (for I or Q streams) must be analog"

what i can get from your question is 

usually the dac is one but it has two channels (for i & q) and they both
work independently but actually for transmission oyu dont need both one is
enough 

man you really need to see what is actually done to samples of data that
you get after sampling and how qpsk works on it and after wards how you
take both of them for further processing


@ Eric Jacobsen 
This is done routinely in satellite or other low SNR systems where the
>> 1.5dB or so that is lost in differential decoding can't be tolerated.


can you  plz name this method used instead of diffrential one 

On Sun, 19 Dec 2010 15:08:23 -0600, "Avier"
<shahanwarkhan@n_o_s_p_a_m.hotmail.com> wrote:

>>
>>> Could some DSP guru please clarify the following a bit ?
>>> Suppose that a serial bit stream has to transmitted via
>>> QPSK. At first, the serial bit stream has to be divided into
>>> two - n bits/second to two n/2 bits/second. This can be
>>> done with a serial to parallel converter. Now, the input to
>>> any of the two mixers (for I or Q streams) must be analog,
>>> so that bits need to be passed through a DAC so that the
>>> final analog input to the mixers can take values +/- V volts.
>>> So suppose that a bit '1' has been passed to the DAC for
>>> I channel, and similarly a '1' has been passed to the DAC
>>> for the Q channel - what does the DAC for the Q channel
>>> generate a -V pulse ? Or is it the case that the DAC receives
>>> the number of bits per symbol ?
>>> I am trying to understand the practical details of QPSK,
>>> as compared to what I learnt in my classes. BTW, I work
>>> in firmware and hardware.
>>
>
> "the input to any of the two mixers (for I or Q streams) must be analog"
>
>what i can get from your question is 
>
>usually the dac is one but it has two channels (for i & q) and they both
>work independently but actually for transmission oyu dont need both one is
>enough 
>
>man you really need to see what is actually done to samples of data that
>you get after sampling and how qpsk works on it and after wards how you
>take both of them for further processing
>
>
>@ Eric Jacobsen 
>This is done routinely in satellite or other low SNR systems where the
>>> 1.5dB or so that is lost in differential decoding can't be tolerated.
>
>
>can you  plz name this method used instead of diffrential one 

Coherent reception or coherent demodulation or coherent detection.
The word "coherent" should be in the description, but other words may
be used with it.






Eric Jacobsen
Minister of Algorithms
Abineau Communications
http://www.abineau.com

Thank you very much for your very informative, insightful and clear
comments that have really helped clear a lot of my doubts. Same goes
for Eric Jacobsen's comments. Thanks a lot.
On Dec 19, 10:31 pm, Tim Wescott <t...@seemywebsite.com> wrote:
>
> There's almost never a real DAC, as in some purpose-designed bit of off-
> the-shelf hardware, in the circuit.  All that's necessary is some mixing
> arrangement that passes the carrier through unmolested when a '0' is
> present, and reverses it's phase by 180 degrees when a '1' is present (or
> visa-versa).  You could do this with logic-level output (0V or 3.3V, for
> instance) that gets translated to a positive or negative voltage then
> applied to a mixer; you could do this by generating a logic level pair
> (0V and 3.3V vs. 3.3V and 0V) that drives a balanced mixer directly, or
> you could do it with something as easy as an XOR gate with your data bit
> going into one pin and your carrier into another.
>
> Just to confuse you a bit more, DQPSK is much more common in real life
> than plain old QPSK.  DQPSK differentiates the symbol stream, so that the
> phase will advance an amount proportional to the bit pattern (i.e., not
> at all for 00, +90 for 01, 180 for 10, and -90 for 11).  Using DQPSK
> frees the receiver from needing an absolute phase reference, which makes
> communications oh so much easier* at the loss of a few dB of noise
> performance.
>
> Two sources I can think of for practical knowledge on QPSK are the ARRL
> Handbook (but I just looked at my 2008 edition, and the information is
> disappointingly scant) and my Master's Thesis, which is posted on the web:http://www.wescottdesign.com/articles/MSK/mskTop.html.  Neither of these
> is a _good_ reference -- they're just the ones that I know off the top of
> my head!
>
> * I have been told by people that have tried that you can attempt to make
> systems that assumes an absolute phase reference, coupled with an error
> correcting code that only works with one alignment of the carrier phase,
> with the whole mess fed back to the carrier reference.  You end up with a
> system that gives you a HUGE burst of errors every time your phase
> reference hiccups, instead of an itty bitty one.
>
> --http://www.wescottdesign.com