What will the phase detector gain for a software PLL be?
Phase detector gain for a software PLL??
Started by ●February 17, 2011
Reply by ●February 17, 20112011-02-17
On Feb 17, 1:15�am, "mir_aculous" <gnu.fanz@n_o_s_p_a_m.gmail.com> wrote:> What will the phase detector gain for a software PLL be?It depends on the phase detector. For an arctangent type, the PD gain can be one because an input phase difference of X radians produces an output of X radians, regardless of the input magnitudes. For a multiplier, the input magnitudes change the output. John
Reply by ●February 17, 20112011-02-17
On 02/16/2011 10:15 PM, mir_aculous wrote:> What will the phase detector gain for a software PLL be?Whatever it is. There are several bazillion different ways to make a phase detector, to go with the bazillion different uses to which a phase-locked loop may be put. Give specifics. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Do you need to implement control loops in software? "Applied Control Theory for Embedded Systems" was written for you. See details at http://www.wescottdesign.com/actfes/actfes.html
Reply by ●February 17, 20112011-02-17
>On 02/16/2011 10:15 PM, mir_aculous wrote: >> What will the phase detector gain for a software PLL be? > >Whatever it is. There are several bazillion different ways to make a >phase detector, to go with the bazillion different uses to which a >phase-locked loop may be put. > >Give specifics.In case of a spread spectrum demodulator where, phi_carr = arctan(Qk/Ik) where, Qk and Ik is output from the quadrature and inphase arm of the correlator. or in case of the code lock loop, phi_code = (Ie^2+Qe^2) - (Il^2+Ql^2), where Ie, Qe, Il, Ql are the correlation results from the early-late correlators.> >-- > >Tim Wescott >Wescott Design Services >http://www.wescottdesign.com > >Do you need to implement control loops in software? >"Applied Control Theory for Embedded Systems" was written for you. >See details at http://www.wescottdesign.com/actfes/actfes.html >
Reply by ●February 17, 20112011-02-17
On Thu, 17 Feb 2011 14:00:59 -0600, "mir_aculous" <gnu.fanz@n_o_s_p_a_m.gmail.com> wrote:>>On 02/16/2011 10:15 PM, mir_aculous wrote: >>> What will the phase detector gain for a software PLL be? >> >>Whatever it is. There are several bazillion different ways to make a >>phase detector, to go with the bazillion different uses to which a >>phase-locked loop may be put. >> >>Give specifics. > > >In case of a spread spectrum demodulator where, > > phi_carr = arctan(Qk/Ik) > > where, Qk and Ik is output from the quadrature and inphase arm of the >correlator. > >or in case of the code lock loop, > > phi_code = (Ie^2+Qe^2) - (Il^2+Ql^2), > > where Ie, Qe, Il, Ql are the correlation results from the early-late >correlators. >For most analysis methods the phase detector and NCO gains have to be dimensionally compatible, in that they resolve to 1/seconds when multiplied together. Usually the detector gain is called Kd and the oscillator (or NCO or DDS) gain is called Ko, and KoKd has units of 1/s. For example, say that a detector has a slope in the lock region with units of V/radian and the oscillator has gain expressed with units of Radians/(sec-Volt). The product will be 1/s. Sort out what units want to use in your analysis and then you can sort out the gain of the detector. It's not hard to do it graphically if not otherwise. Eric Jacobsen http://www.ericjacobsen.org http://www.dsprelated.com/blogs-1//Eric_Jacobsen.php
Reply by ●February 19, 20112011-02-19
On Thu, 17 Feb 2011 14:00:59 -0600, mir_aculous wrote:>>On 02/16/2011 10:15 PM, mir_aculous wrote: >>> What will the phase detector gain for a software PLL be? >> >>Whatever it is. There are several bazillion different ways to make a >>phase detector, to go with the bazillion different uses to which a >>phase-locked loop may be put. >> >>Give specifics. > > > In case of a spread spectrum demodulator where, > > phi_carr = arctan(Qk/Ik) > > where, Qk and Ik is output from the quadrature and inphase arm of the > correlator. > > or in case of the code lock loop, > > phi_code = (Ie^2+Qe^2) - (Il^2+Ql^2), > > where Ie, Qe, Il, Ql are the correlation results from the early-late > correlators.Figure out what the incremental change of value out of the phase detector is for an incremental change in the actual phase error. Your phi_carr case should be 1, but I think you'll find that your phi_code case depends on the ratio between your chip rate and carrier (if it's the carrier you're changing). It'll also depend on the received signal strength -- you may want to fix that. -- http://www.wescottdesign.com
Reply by ●February 20, 20112011-02-20
>What will the phase detector gain for a software PLL be? >Note that output from A/D consists both signal and noise component, especially for receivers work under very low signal level. Many receivers have a module named I-D(Integrate-Dump) or something similar to filter out noise and to decrease data rate to nominal symbol rate. After I-D, signal power may be much less than what you measure from output of A/D, which means real phase detector gain is less than what computed theoretically. In order to maintain a relatively constant phase detector gain for the loop, phase error should be adjusted to some threshold before fed to NCO. It is this threshold instead of the equations define the real phase detector gain.
