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Decimate by 2 - DDC FI at 3fs/4

Started by slayerz13 March 17, 2011
Hello,

I am studying a DDC working with FI = 3fs/4, and I have something that I
don't understand for the quadrature demultiplexing. Here are the steps of
the quadrature downconversion of the studied system :

0) The signal at FI is sampled at Fs. This is what I receive in my DDC

1) The central frequency of the nearest band to zero of the sampled signal
is equal to Fs/4

2) So, to shift this band to base band (B=40MHz), I multiply by
"simplified" sin and cos (1,0, 1,0) and (0,1,0,-1)

3) Now I have my band centered to zero

4) I perform a low-pass filtering (FIR) for I and Q channels 

5) Now, I have my data I/Q with one sample over two equal to zero for each
channel, so I can mux my I/Q data, at Fs frequency.

I implement this DDC in VHDL.

But, in this system, a decimation by 2 is performed at the output of each
FIR (or during the I/Q demultiplexing, by allocating one sample over two to
the FIRs) . My question is why ?
I tried to do this two ways of decimation, but the result is a droop, from
about fs/4 to fs/2, caused by this decimation. And I can not compensate
this droop by an other FIR because I need to re-decimate by 2 (if I
understand well the operation on a compensating FIR).
So I don't understand this decimation by 2, do I really need it ?

Thank you.
Sorry for my English, I try to be comprehensible!



On 17.03.2011 16:19, slayerz13 wrote:
> I am studying a DDC working with FI = 3fs/4, and I have something that I > don't understand for the quadrature demultiplexing. Here are the steps of > the quadrature downconversion of the studied system : > > 0) The signal at FI is sampled at Fs. This is what I receive in my DDC > > 1) The central frequency of the nearest band to zero of the sampled signal > is equal to Fs/4 > > 2) So, to shift this band to base band (B=40MHz), I multiply by > "simplified" sin and cos (1,0, 1,0) and (0,1,0,-1) > > 3) Now I have my band centered to zero > > 4) I perform a low-pass filtering (FIR) for I and Q channels > > 5) Now, I have my data I/Q with one sample over two equal to zero for each > channel, so I can mux my I/Q data, at Fs frequency.
Wrong, the filter will smooth the input data and the output won't be i_out[n], 0, i_out[n+2], 0, ... 0, q_out[n+1],0, q_out[n+3] like you suppose.
> But, in this system, a decimation by 2 is performed at the output of each > FIR (or during the I/Q demultiplexing, by allocating one sample over two to > the FIRs)
I guess that you mean downsampling by 2 (decimation is the combination of filtering and downsampling). > My question is why ? Because at least half of the filter's output spectrum doesn't contain relevant information.
> I tried to do this two ways of decimation, but the result is a droop, from > about fs/4 to fs/2, caused by this decimation. And I can not compensate > this droop by an other FIR because I need to re-decimate by 2 (if I > understand well the operation on a compensating FIR). > So I don't understand this decimation by 2, do I really need it ?
Assuming real bandlimited input signal with a bandwidth of W Hz, then after downconversion it will contain a relevant part located in [-W/2 ... W/2] Hz and spectral images located in [fs/2-W/2 ... fs/2] and [-fs/2 ... -fs/2+W/2]. You remove spectral images by lowpass filtering with a filter that has a transition band from W/2 to fs/2-W/2 and then simply discard every other sample because at this stage a sampling frequency at least twice lower than fs is enough, since the baseband signal doesn't contain frequencies above +-fs/2.
> > Thank you. > Sorry for my English, I try to be comprehensible! > > >
-- Alexander
Correction:
.. since the baseband signal at the filter output doesn't contain 
frequencies above +-fs/4.

-- 

Alexander
> > 2) So, to shift this band to base band (B=40MHz), I multiply by > "simplified" sin and cos (1,0, 1,0) and (0,1,0,-1) >
(1,0,-1,0) and (0,1,0,-1) Dirk
>Correction: >.. since the baseband signal at the filter output doesn't contain >frequencies above +-fs/4. > >-- > >Alexander >
Thank you for your quick answer. The problem is that my signal still contain frequencies above +-fs/4 : so I think that the design of my FIRs are not good. Indeed : For example, Fs=100Mhz, B=40MHz. I shift by 25 MHz and downsample by 2 my signal during the same operation (by not taking into account the samples equal to zero). Then, I design my FIRs with matlab : - Lowpass, Fs = 100MHz (or Fs/2 ?), Fc = 20 MHz (=B/2) At the end, if I want to visualize the output signal (I for example), if I understand wellj I just need to make my FFT between -fs/4 and fs/4 : I don't have to take into account the signal above +-fs/4 although it exists and has an attenuation ? Thank you.
On 17.03.2011 18:41, slayerz13 wrote:

> For example, Fs=100Mhz, B=40MHz. > I shift by 25 MHz and downsample by 2 my signal during the same operation > (by not taking into account the samples equal to zero).
Then the samples of imaginary and quadrature components will belong to different time instants.
> > Then, I design my FIRs with matlab : > - Lowpass, Fs = 100MHz (or Fs/2 ?), Fc = 20 MHz (=B/2)
You should design a filter running at Fs=100 MHz with a cutoff frequency of 20 MHz and a stopband frequency of 30 MHz. Apply the mixer outputs to the I/Q channel filters directly (with zeros) and discard every other sample from their outputs. And of course anything that is not suppressed well enough in the stopband will alias into the passband after downsampling. -- Alexander
What i wrote in the previous post is just the basic concept and can be 
optimized for hardware implementation.

-- 

Alexander
>On 17.03.2011 18:41, slayerz13 wrote: > >> For example, Fs=100Mhz, B=40MHz. >> I shift by 25 MHz and downsample by 2 my signal during the same
operation
>> (by not taking into account the samples equal to zero). > >Then the samples of imaginary and quadrature components will belong to >different time instants. > >> >> Then, I design my FIRs with matlab : >> - Lowpass, Fs = 100MHz (or Fs/2 ?), Fc = 20 MHz (=B/2) > >You should design a filter running at Fs=100 MHz with a cutoff frequency >of 20 MHz and a stopband frequency of 30 MHz. Apply the mixer outputs to >the I/Q channel filters directly (with zeros) and discard every other >sample from their outputs. And of course anything that is not suppressed >well enough in the stopband will alias into the passband after >downsampling. > >-- > >Alexander >
Ok, so I have to apply the lowpass filtering to the I/Q channels at Fs (with the zeros). I thought that I could mix, and suppress the zeros from the I/Q, and then perform the filtering (so the filter could operate, in this case, at Fs/2). So now, like you said, I have to add after the FIRs something to suppress zeros and thus, make I/Q signals at Fs/2.
>What i wrote in the previous post is just the basic concept and can be >optimized for hardware implementation. > >-- > >Alexander >
Yes, precisely, I have to make an hardware implementation. That's the reason why I wanted to use the particularity of a fs/4 signal. My DDC is implemented in VHDL.

Dirk Bell wrote:

>>2) So, to shift this band to base band (B=40MHz), I multiply by >>"simplified" sin and cos (1,0, 1,0) and (0,1,0,-1) >> > > > (1,0,-1,0) and (0,1,0,-1)
No need for 3 levels. (1,1,-1,-1) and (1,-1,-1,1) are just as good. Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com