Hi guys I have a repetitive action controller which is generating/controlling signal with 1024 sampling points/intervals in one period of fundamental harmonic. The frequency of fundamental harmonic is somewhere between 40 Hz and 70 Hz. No mater what the frequency of fundamental signal is I always have 1024 sampling points/intervals in order to get good results from FFT/DFT (no spectral leakage, no windowing �). The required frequency resolution is better than 0.01Hz. The whole system is based on MCU which runs at 100 MHz. A sampling period can only be integer multiple of MCU clock period. Thus with constant sampling period I can generate only a few fundamentals between 40Hz and 70 Hz. (e.g. with MCU timer value of 1953 I get fundamental period of 100 MHz/ (1953*1024) =50.00320 Hz, but with timer value of 1952 I get fundamental period of 50.02882) For all the rest I use the trick (probably well known) of variable sampling frequency. But variable in the sense that I switch just between two MCU timer values within one period of fundamental. (e.g. to get fundamental frequency of 50.0160Hz I'd have 50%(512) of sampling intervals 1053 MCU cycles long and the rest 50% would be 1052 MCU cycles long) My system works fine and I am completely satisfied with it. But as I am curious here are my questions: 1. Does this trick have a name? 2. Is there any literature on this trick that you can point me to? (Please be aware that I am more of a power electronics guy than DSP). I've tried searching "variable sampling" and similar phrases, but mostly I get research where variable means variable in much wider range than mine. 3. I suspect if I'd look close enough I'd see that my 50.016 Hz from above example is probably 50.02882 and 50.00320. But somehow I don't believe that is all. What additional frequencies can I expect using this scheme? Best regards, Mitja Nemec
effects of variable sampling rate on spectrum of a signal
Started by ●April 15, 2011
Reply by ●April 15, 20112011-04-15
On Apr 15, 9:02�am, Mitja Nemec <kore...@yahoo.co.uk> wrote:> Hi guys > > I have a repetitive action controller which is generating/controlling > signal with 1024 sampling points/intervals in one period of > fundamental harmonic. The frequency of fundamental harmonic is > somewhere between 40 Hz and 70 Hz. No mater what the frequency of > fundamental signal is I always have 1024 sampling points/intervals in > order to get good results from FFT/DFT (no spectral leakage, no > windowing �).This is where you make the first wrong turn.> The required frequency resolution is better than 0.01Hz. The whole > system is based on MCU which runs at 100 MHz. A sampling period can > only be integer multiple of MCU clock period. Thus with constant > sampling period I can generate only a few fundamentals between 40Hz > and 70 Hz. > (e.g. with MCU timer value of 1953 I get fundamental period of 100 MHz/ > (1953*1024) =50.00320 Hz, > but with timer value of 1952 I get fundamental period of 50.02882)This is assuming that everything cmplies perfectly to spec. Which never happens.> For all the rest I use the trick (probably well known) of variable > sampling frequency. But variable in the sense that I switch just > between two MCU timer values within one period of fundamental. (e.g. > to get fundamental frequency of 50.0160Hz I'd have 50%(512) of > sampling intervals 1053 MCU cycles long and the rest 50% would be 1052 > MCU cycles long)Why?> My system works fine and I am completely satisfied with it. But as I > am curious here are my questions: > 1. � � �Does this trick have a name?No.> 2. � � �Is there any literature on this trick that you can point me to? > (Please be aware that I am more of a power electronics guy than DSP). > I've tried searching "variable sampling" and similar phrases, but > mostly I get research where variable means variable in much wider > range than mine.This is a layman's solution to a problem that does not exist. No literature.> 3. � � �I suspect if I'd look close enough I'd see that my 50.016 Hz from > above example is probably 50.02882 and 50.00320. But somehow I don't > believe that is all. What additional frequencies can I expect using > this scheme?Blue. If that answer doesn't make sense to you, it's because your question isn't even wrong. Rune
Reply by ●April 15, 20112011-04-15
On 04/15/2011 12:12 AM, Rune Allnor wrote:> On Apr 15, 9:02 am, Mitja Nemec<kore...@yahoo.co.uk> wrote: >> Hi guys >> >> I have a repetitive action controller which is generating/controlling >> signal with 1024 sampling points/intervals in one period of >> fundamental harmonic. The frequency of fundamental harmonic is >> somewhere between 40 Hz and 70 Hz. No mater what the frequency of >> fundamental signal is I always have 1024 sampling points/intervals in >> order to get good results from FFT/DFT (no spectral leakage, no >> windowing �). > > This is where you make the first wrong turn.And why, exactly? If he knows his signal frequency, and the content of the signal is all synchronized with the fundamental, then it sounds like a very correct approach, to me.>> The required frequency resolution is better than 0.01Hz. The whole >> system is based on MCU which runs at 100 MHz. A sampling period can >> only be integer multiple of MCU clock period. Thus with constant >> sampling period I can generate only a few fundamentals between 40Hz >> and 70 Hz. >> (e.g. with MCU timer value of 1953 I get fundamental period of 100 MHz/ >> (1953*1024) =50.00320 Hz, >> but with timer value of 1952 I get fundamental period of 50.02882) > > This is assuming that everything cmplies perfectly to > spec. Which never happens.Oh for crying out loud. You must be a mathematician. Two male grad students, a mathematician and an engineer, are brought to a room, in the center of which stands a really good looking woman. The guys are instructed that the first one to reach the girl gets to kiss her. But, they must travel thusly: each step they take can be no more than half the distance from where they stand to the center of the room. The mathematicians shoulders sag, and he declares "I'll never get there, I'll just give up now". The engineer strides forth, declaring "you're right! but I'll get close enough!" Never get defeated by things not matching their platonic ideals -- instead, ask if you'll get close enough.>> For all the rest I use the trick (probably well known) of variable >> sampling frequency. But variable in the sense that I switch just >> between two MCU timer values within one period of fundamental. (e.g. >> to get fundamental frequency of 50.0160Hz I'd have 50%(512) of >> sampling intervals 1053 MCU cycles long and the rest 50% would be 1052 >> MCU cycles long) > > Why? > >> My system works fine and I am completely satisfied with it. But as I >> am curious here are my questions: >> 1. Does this trick have a name? > > No. > >> 2. Is there any literature on this trick that you can point me to? >> (Please be aware that I am more of a power electronics guy than DSP). >> I've tried searching "variable sampling" and similar phrases, but >> mostly I get research where variable means variable in much wider >> range than mine. > > This is a layman's solution to a problem that does not exist. > No literature.It sounds like a smart layman, to me.>> 3. I suspect if I'd look close enough I'd see that my 50.016 Hz from >> above example is probably 50.02882 and 50.00320. But somehow I don't >> believe that is all. What additional frequencies can I expect using >> this scheme? > > Blue. > > If that answer doesn't make sense to you, it's because your > question isn't even wrong.He's asking how to check if he'll get close enough, Rune, not if he meets some mathematical ideal. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Do you need to implement control loops in software? "Applied Control Theory for Embedded Systems" was written for you. See details at http://www.wescottdesign.com/actfes/actfes.html
Reply by ●April 15, 20112011-04-15
On 04/15/2011 12:02 AM, Mitja Nemec wrote:> Hi guys > > I have a repetitive action controller which is generating/controlling > signal with 1024 sampling points/intervals in one period of > fundamental harmonic. The frequency of fundamental harmonic is > somewhere between 40 Hz and 70 Hz. No mater what the frequency of > fundamental signal is I always have 1024 sampling points/intervals in > order to get good results from FFT/DFT (no spectral leakage, no > windowing �).As I mentioned to Rune, this is true only if the signal consists of that fundamental and all of its harmonics. If the signal has components that are not synchronized with the fundamental, then those will suffer from spectral leakage.> The required frequency resolution is better than 0.01Hz.Do you mean that the required resolution of the bins of your FFT must be better than 0.01Hz? That doesn't match with taking an FFT over one cycle of a 50Hz fundamental. What are you really doing?> The whole > system is based on MCU which runs at 100 MHz. A sampling period can > only be integer multiple of MCU clock period. Thus with constant > sampling period I can generate only a few fundamentals between 40Hz > and 70 Hz. > (e.g. with MCU timer value of 1953 I get fundamental period of 100 MHz/ > (1953*1024) =50.00320 Hz, > but with timer value of 1952 I get fundamental period of 50.02882) > > For all the rest I use the trick (probably well known) of variable > sampling frequency. But variable in the sense that I switch just > between two MCU timer values within one period of fundamental. (e.g. > to get fundamental frequency of 50.0160Hz I'd have 50%(512) of > sampling intervals 1053 MCU cycles long and the rest 50% would be 1052 > MCU cycles long) > > My system works fine and I am completely satisfied with it. But as I > am curious here are my questions: > 1. Does this trick have a name?"Sample clock dithering". There. It has a name now.> 2. Is there any literature on this trick that you can point me to? > (Please be aware that I am more of a power electronics guy than DSP). > I've tried searching "variable sampling" and similar phrases, but > mostly I get research where variable means variable in much wider > range than mine.Not specifically, but there are ways and ways of doing the analysis.> 3. I suspect if I'd look close enough I'd see that my 50.016 Hz from > above example is probably 50.02882 and 50.00320. But somehow I don't > believe that is all. What additional frequencies can I expect using > this scheme?You can get part way to analyzing this by going back to the model of sampling that has you multiplying the signal by dirac delta functionals at the sample rate. Then the resulting sampled signal can still be analyzed in the continuous-time domain, and it is found to be the spectrum of the sequence of deltas convolved with the original signal's spectrum. You can still do this if the deltas are not sampled at an even rate, and this still gives you the spectrum in the continuous time domain. Unfortunately, you cannot then make the leap from the strengths of the resulting samples to the discrete-time domain, because you have violated the basic premise of even sampling. I would suggest that you take this in another direction. Do two things: first, dither the sample clock over the shortest time period that you can. I'd use a delta-sigma modulator*. In other words, if you need to achieve 50.0160Hz, alternate your sampling intervals instead of doing 512 of one and 512 of another; second, treat difference between your irregularly sampled signal and a regularly sampled one as noise, rather than trying to predict it. If you do this, then you will find (unfortunately) that the apparent noise is multiplicative: the higher the slope of the signal, the more noise you will see as a consequence of clock dithering. But that's where the unfortunateness ends: given an estimate of your signal's spectrum, you can predict your worst-case noise, and you can determine if it's going to be a problem or not. Note that if you really truly need to get 0.01Hz frequency resolution out of your system, then your whole premise is moot: for that resolution, you need to gather a sample that's at least 100 seconds long. Further, it's that huge sample that needs to be an integer number of cycles of your fundamental, not each bit inside the fundamental (unless the frequency of your fundamental changes too fast). * http://www.wescottdesign.com/articles/sigmadelta.html, or http://www.eetimes.com/design/embedded/4006431/Sigma-delta-techniques-extend-DAC-resolution -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Do you need to implement control loops in software? "Applied Control Theory for Embedded Systems" was written for you. See details at http://www.wescottdesign.com/actfes/actfes.html
Reply by ●April 15, 20112011-04-15
Mitja Nemec wrote:> Hi guys > > I have a repetitive action controller which is generating/controlling > signal with 1024 sampling points/intervals in one period of > fundamental harmonic. The frequency of fundamental harmonic is > somewhere between 40 Hz and 70 Hz. No mater what the frequency of > fundamental signal is I always have 1024 sampling points/intervals in > order to get good results from FFT/DFT (no spectral leakage, no > windowing �)[...Nonsense snipped...] And what is exactly the input and the final output that you are trying to accomplish? Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com
Reply by ●April 15, 20112011-04-15
On Apr 15, 9:02 am, Mitja Nemec <kore...@yahoo.co.uk> wrote:> Hi guys > > I have a repetitive action controller which is generating/controlling > signal with 1024 sampling points/intervals in one period of > fundamental harmonic. The frequency of fundamental harmonic is > somewhere between 40 Hz and 70 Hz. No mater what the frequency of > fundamental signal is I always have 1024 sampling points/intervals in > order to get good results from FFT/DFT (no spectral leakage, no > windowing �).> The required frequency resolution is better than 0.01Hz. The whole > system is based on MCU which runs at 100 MHz. A sampling period can > only be integer multiple of MCU clock period. Thus with constant > sampling period I can generate only a few fundamentals between 40Hz > and 70 Hz. > (e.g. with MCU timer value of 1953 I get fundamental period of 100 MHz/ > (1953*1024) =50.00320 Hz, > but with timer value of 1952 I get fundamental period of 50.02882)> For all the rest I use the trick (probably well known) of variable > sampling frequency. But variable in the sense that I switch just > between two MCU timer values within one period of fundamental. (e.g. > to get fundamental frequency of 50.0160Hz I'd have 50%(512) of > sampling intervals 1053 MCU cycles long and the rest 50% would be 1052 > MCU cycles long)> My system works fine and I am completely satisfied with it. But as I > am curious here are my questions: > 1. Does this trick have a name?It's called a fractional divider.> 2. Is there any literature on this trick that you can point me to? > (Please be aware that I am more of a power electronics guy than DSP). > I've tried searching "variable sampling" and similar phrases, but > mostly I get research where variable means variable in much wider > range than mine.> 3. I suspect if I'd look close enough I'd see that my 50.016 Hz from > above example is probably 50.02882 and 50.00320. But somehow I don't > believe that is all. What additional frequencies can I expect using > this scheme?Your clock will have frequency modulation sidebands called fractional spurs; but since you are dithering between two frequencies so close together, the sideband spacing will be very small. I suspect there will be some leakage of power between adjacent FFT bins.
Reply by ●April 15, 20112011-04-15
On Apr 15, 1:02�pm, Tim Wescott <t...@seemywebsite.com> wrote: ...> Note that if you really truly need to get 0.01Hz frequency resolution > out of your system, then your whole premise is moot: for that > resolution, you need to gather a sample that's at least 100 seconds > long. �Further, it's that huge sample that needs to be an integer number > of cycles of your fundamental, not each bit inside the fundamental > (unless the frequency of your fundamental changes too fast).Note that if he worries about frequencies like 50.0160Hz, he better look carefully at the accuracy of his crystal. Jerry -- Engineering is the art of making what you want from things you can get.
Reply by ●April 15, 20112011-04-15
On 04/15/2011 03:22 PM, Jerry Avins wrote:> On Apr 15, 1:02 pm, Tim Wescott<t...@seemywebsite.com> wrote: > > ... > >> Note that if you really truly need to get 0.01Hz frequency resolution >> out of your system, then your whole premise is moot: for that >> resolution, you need to gather a sample that's at least 100 seconds >> long. Further, it's that huge sample that needs to be an integer number >> of cycles of your fundamental, not each bit inside the fundamental >> (unless the frequency of your fundamental changes too fast). > > Note that if he worries about frequencies like 50.0160Hz, he better > look carefully at the accuracy of his crystal.Why didn't I notice that? I had been kind of thinking that it would be a good idea for him to see if just measuring for the closest he could come to one period would be good enough -- I should have said it then, but at least I've said it now! -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Do you need to implement control loops in software? "Applied Control Theory for Embedded Systems" was written for you. See details at http://www.wescottdesign.com/actfes/actfes.html
Reply by ●April 15, 20112011-04-15
Tim Wescott <tim@seemywebsite.com> wrote:> On 04/15/2011 03:22 PM, Jerry Avins wrote:(snip)>> Note that if he worries about frequencies like 50.0160Hz, he better >> look carefully at the accuracy of his crystal.> Why didn't I notice that?> I had been kind of thinking that it would be a good idea for him to see > if just measuring for the closest he could come to one period would be > good enough -- I should have said it then, but at least I've said it now!I suppose that there are some cases where relative frequency was important, but absolute wasn't so important. The OP still didn't explain the actual problem, so it is hard to know if the suggestions are useful or not. If, for example, the 50Hz was a power line frequency, that would be nice to know. My favorite solution is to phase lock the sample clock to a multiple of the source. Then you can nicely fit 1024 samples into an integer number of periods. (If, for example, you wanted the harmonic content.) There is an explanation of a problem when Knuth was developing TeX, and printing to what he was told was a 5333 dpi phototypesetter, and getting very poor results. When he found it was actually 5333 and one third dpi, then everything was fine. It is amazing what kinds of relative errors the eye can see! Presumably the absolute frequency wasn't so important, though. (The relative error is smaller than between 50 and 50.016.) -- glen
Reply by ●April 15, 20112011-04-15
On Apr 15, 12:02�am, Mitja Nemec <kore...@yahoo.co.uk> wrote:> Hi guys > > I have a repetitive action controller which is generating/controlling > signal with 1024 sampling points/intervals in one period of > fundamental harmonic. The frequency of fundamental harmonic is > somewhere between 40 Hz and 70 Hz. No mater what the frequency of > fundamental signal is I always have 1024 sampling points/intervals in > order to get good results from FFT/DFT (no spectral leakage, no > windowing �). > The required frequency resolution is better than 0.01Hz. The whole > system is based on MCU which runs at 100 MHz. A sampling period can > only be integer multiple of MCU clock period. Thus with constant > sampling period I can generate only a few fundamentals between 40Hz > and 70 Hz. > (e.g. with MCU timer value of 1953 I get fundamental period of 100 MHz/ > (1953*1024) =50.00320 Hz, > but with timer value of 1952 I get fundamental period of 50.02882) > > For all the rest I use the trick (probably well known) of variable > sampling frequency. But variable in the sense that I switch just > between two MCU timer values within one period of fundamental. (e.g. > to get fundamental frequency of 50.0160Hz I'd have 50%(512) of > sampling intervals 1053 MCU cycles long and the rest 50% would be 1052 > MCU cycles long) > > My system works fine and I am completely satisfied with it. But as I > am curious here are my questions: > 1. � � �Does this trick have a name? > 2. � � �Is there any literature on this trick that you can point me to? > (Please be aware that I am more of a power electronics guy than DSP). > I've tried searching "variable sampling" and similar phrases, but > mostly I get research where variable means variable in much wider > range than mine.You might want to read up on sampling jitter, and the effects of sampling jitter on signal distortion and signal to noise ratio. If the distortion introduced by the amount of sampling jitter you introduce is under the noise floor, you may get results that have some value. You may want to randomize or dither your sampling jitter to whiten your introduced sampling noise. IMHO. YMMV. -- rhn AT nicholson DOT com http://www.nicholson.com/rhn/dsp.html
