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cascaded CIC + FIRs, several methods ?

Started by slayerz13 April 21, 2011
Hello !

I have some questions about how to implement a system that decimates by,
for example, 60 (or equivalent).

Indeed, I read some examples of system with this kind of architecture : CIC
+ CFIR (which decimate by 2, and compensate the smooth caused by the CIC in
the band) + PFIR (which decimate by 2 too, and provides a good response for
the signal at the end).

I also read "Digital Signal Processing with FPGAs" (Meyer-Baese) and
"Multirate signal processing for communication systems" (Harris). But the
system that I just described is not mentioned (except the introduction of
the CFIR, with an inverse sinc response to compensate the smooth of the
CIC, with no decimation).

So, my first question is : Why do we use 2 FIRs after the CIC ? And is it
required that this 2 FIRs decimate ?
For example, if I respect the implementation of the first system, I have to
do : CIC (decimate by 15) + CFIR (inverse sinc, decimate by 2) + PFIR (LP,
decimate by 2).
But what is the difference if I do : CIC (decimate by 60) + CFIR (inverse
sinc with a good order and no decimation).


(I have to implement this on a FPGA)

Thank you for your response !
(and sorry for my english)
On 04/21/2011 04:36 AM, slayerz13 wrote:
> Hello ! > > I have some questions about how to implement a system that decimates by, > for example, 60 (or equivalent). > > Indeed, I read some examples of system with this kind of architecture : CIC > + CFIR (which decimate by 2, and compensate the smooth caused by the CIC in > the band) + PFIR (which decimate by 2 too, and provides a good response for > the signal at the end). > > I also read "Digital Signal Processing with FPGAs" (Meyer-Baese) and > "Multirate signal processing for communication systems" (Harris). But the > system that I just described is not mentioned (except the introduction of > the CFIR, with an inverse sinc response to compensate the smooth of the > CIC, with no decimation). > > So, my first question is : Why do we use 2 FIRs after the CIC ? And is it > required that this 2 FIRs decimate ? > For example, if I respect the implementation of the first system, I have to > do : CIC (decimate by 15) + CFIR (inverse sinc, decimate by 2) + PFIR (LP, > decimate by 2). > But what is the difference if I do : CIC (decimate by 60) + CFIR (inverse > sinc with a good order and no decimation).
You'll have redundant data, with an output signal that has very low energy in the high frequencies. This isn't necessarily a bad thing, if you've got the processing power to handle it. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Do you need to implement control loops in software? "Applied Control Theory for Embedded Systems" was written for you. See details at http://www.wescottdesign.com/actfes/actfes.html
>You'll have redundant data, with an output signal that has very low >energy in the high frequencies. This isn't necessarily a bad thing, if >you've got the processing power to handle it. > >-- > >Tim Wescott >Wescott Design Services >http://www.wescottdesign.com > >Do you need to implement control loops in software? >"Applied Control Theory for Embedded Systems" was written for you. >See details at http://www.wescottdesign.com/actfes/actfes.html >
Thank you for the explanation. But I don't sure to understand why does the output signal will have very low energy for the high frequencies (if I don't perform a second decimation by the FIR inverse sinc)
On Apr 21, 4:36&#4294967295;am, "slayerz13" <slay_13@n_o_s_p_a_m.hotmail.com>
wrote:
> Hello ! > > I have some questions about how to implement a system that decimates by, > for example, 60 (or equivalent). > ...
If your examples are not equivalent and complete designs, perform the filter designs to produce the equivalent total responses and tolerances for each form. Are some of the coefficient designs easier than others? Use the number of coefficients and associated sampling rates to compare the number of multiplies and adds per second that must be performed in each approach. Try the same exercise with other approaches you find or invent. Dale B. Dalrymple
On 04/21/2011 11:13 PM, slayerz13 wrote:
>> You'll have redundant data, with an output signal that has very low >> energy in the high frequencies. This isn't necessarily a bad thing, if >> you've got the processing power to handle it. >> >> -- >> >> Tim Wescott >> Wescott Design Services >> http://www.wescottdesign.com >> >> Do you need to implement control loops in software? >> "Applied Control Theory for Embedded Systems" was written for you. >> See details at http://www.wescottdesign.com/actfes/actfes.html >> > > Thank you for the explanation. > But I don't sure to understand why does the output signal will have very > low energy for the high frequencies (if I don't perform a second decimation > by the FIR inverse sinc)
Then you don't understand what a filter does! A low-pass filter's function is precisely to drastically reduce the energy of any signal component that's in the high frequencies, while allowing low frequency components to pass (relatively) unmolested. I think you need to study up a bit -- how much formal training do you have in signal processing? -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Do you need to implement control loops in software? "Applied Control Theory for Embedded Systems" was written for you. See details at http://www.wescottdesign.com/actfes/actfes.html
On 21.04.2011 15:36, slayerz13 wrote:
> Hello ! > > I have some questions about how to implement a system that decimates by, > for example, 60 (or equivalent). > > Indeed, I read some examples of system with this kind of architecture : CIC > + CFIR (which decimate by 2, and compensate the smooth caused by the CIC in > the band) + PFIR (which decimate by 2 too, and provides a good response for > the signal at the end).
This architecture has been used in Graychip's (currently acquired by Texas Instruments) DDCs.
> > I also read "Digital Signal Processing with FPGAs" (Meyer-Baese) and > "Multirate signal processing for communication systems" (Harris). But the > system that I just described is not mentioned (except the introduction of > the CFIR, with an inverse sinc response to compensate the smooth of the > CIC, with no decimation). >
The only sources i'm aware of where this architecture is mentioned are: 1) TI datasheets for example http://focus.ti.com/lit/ds/symlink/gc4016.pdf 2) Practical FIR filter design in MATLAB by Ricardo Losada https://tagteamdbserver.mathworks.com/ttserverroot/Download/14883_firdesign.pdf The tutorial on filter design with MATLAB by the same author might also be interesting for you http://www.mathworks.com/matlabcentral/fileexchange/19880-digital-filters-with-matlab BTW, the response of CFIR should be the inverse of CIC response, which is not exactly sinc but sinc raised to a power of N.
> So, my first question is : Why do we use 2 FIRs after the CIC ?
I guess that the intent was to separate the tasks of CIC slope compensation and narrowband filtering.
> And is it required that this 2 FIRs decimate ?
It is not required in custom hardware but can be more effective than having one decimation filter only.
> For example, if I respect the implementation of the first system, I have to > do : CIC (decimate by 15) + CFIR (inverse sinc, decimate by 2) + PFIR (LP, > decimate by 2). > But what is the difference if I do : CIC (decimate by 60) + CFIR (inverse > sinc with a good order and no decimation).
Assuming that the overall responses of the two architectures are identical the difference is in the amount of hardware resources required and power consumption.
> (I have to implement this on a FPGA)
You don't have to stick to this particular architecture. There are numerous ways to divide the task of decimation, and it's your goal to find which architecture suits your system requirements best. -- Alexander
>On 04/21/2011 11:13 PM, slayerz13 wrote: >>> You'll have redundant data, with an output signal that has very low >>> energy in the high frequencies. This isn't necessarily a bad thing,
if
>>> you've got the processing power to handle it. >>> >>> -- >>> >>> Tim Wescott >>> Wescott Design Services >>> http://www.wescottdesign.com >>> >>> Do you need to implement control loops in software? >>> "Applied Control Theory for Embedded Systems" was written for you. >>> See details at http://www.wescottdesign.com/actfes/actfes.html >>> >> >> Thank you for the explanation. >> But I don't sure to understand why does the output signal will have
very
>> low energy for the high frequencies (if I don't perform a second
decimation
>> by the FIR inverse sinc) > >Then you don't understand what a filter does! A low-pass filter's >function is precisely to drastically reduce the energy of any signal >component that's in the high frequencies, while allowing low frequency >components to pass (relatively) unmolested. > >I think you need to study up a bit -- how much formal training do you >have in signal processing? > >-- > >Tim Wescott >Wescott Design Services >http://www.wescottdesign.com > >Do you need to implement control loops in software? >"Applied Control Theory for Embedded Systems" was written for you. >See details at http://www.wescottdesign.com/actfes/actfes.html >
in fact, I did not understand the meaning of your sentence. I have a pretty good background in signal processing, but everything about digital filtering (and especially the methods of multirate signal processing), I have not had proper training. I read some books on that subject. That's why I asked this question on this architecture, because it's different from what I read in my books and on the internet.
On Apr 26, 9:38&#4294967295;am, "slayerz13" <slay_13@n_o_s_p_a_m.hotmail.com>
wrote:
> >On 04/21/2011 11:13 PM, slayerz13 wrote:
> >> Thank you for the explanation. > >> But I don't sure to understand why does the output signal will have > very > >> low energy for the high frequencies (if I don't perform a second > decimation > >> by the FIR inverse sinc) > > >Then you don't understand what a filter does! &#4294967295;
> in fact, I did not understand the meaning of your sentence. > I have a pretty good background in signal processing, but everything about > digital filtering (and especially the methods of multirate signal > processing), I have not had proper training.
Well, any decent intro course on DSP will comprise some 40%-60% material on filters. That's the first application that is discussed in such a class, after one has dealt with the theorethical basics. So your claim that you "have a pretty good background in signal processing" doesn't quite add up with the statement that you "have not had proper training" wrt filters... Rune
>On 21.04.2011 15:36, slayerz13 wrote: >> Hello ! >> >> I have some questions about how to implement a system that decimates
by,
>> for example, 60 (or equivalent). >> >> Indeed, I read some examples of system with this kind of architecture :
CIC
>> + CFIR (which decimate by 2, and compensate the smooth caused by the CIC
in
>> the band) + PFIR (which decimate by 2 too, and provides a good response
for
>> the signal at the end). > >This architecture has been used in Graychip's (currently acquired by >Texas Instruments) DDCs. > >> >> I also read "Digital Signal Processing with FPGAs" (Meyer-Baese) and >> "Multirate signal processing for communication systems" (Harris). But
the
>> system that I just described is not mentioned (except the introduction
of
>> the CFIR, with an inverse sinc response to compensate the smooth of the >> CIC, with no decimation). >> > >The only sources i'm aware of where this architecture is mentioned are: >1) TI datasheets >for example http://focus.ti.com/lit/ds/symlink/gc4016.pdf >2) Practical FIR filter design in MATLAB by Ricardo Losada >https://tagteamdbserver.mathworks.com/ttserverroot/Download/14883_firdesign.pdf >The tutorial on filter design with MATLAB by the same author might also >be interesting for you >http://www.mathworks.com/matlabcentral/fileexchange/19880-digital-filters-with-matlab > >BTW, the response of CFIR should be the inverse of CIC response, which >is not exactly sinc but sinc raised to a power of N. > >> So, my first question is : Why do we use 2 FIRs after the CIC ? > >I guess that the intent was to separate the tasks of CIC slope >compensation and narrowband filtering. > >> And is it required that this 2 FIRs decimate ? >It is not required in custom hardware but can be more effective than >having one decimation filter only. > >> For example, if I respect the implementation of the first system, I have
to
>> do : CIC (decimate by 15) + CFIR (inverse sinc, decimate by 2) + PFIR
(LP,
>> decimate by 2). >> But what is the difference if I do : CIC (decimate by 60) + CFIR
(inverse
>> sinc with a good order and no decimation). > >Assuming that the overall responses of the two architectures are >identical the difference is in the amount of hardware resources >required and power consumption. > > >> (I have to implement this on a FPGA) > >You don't have to stick to this particular architecture. There are >numerous ways to divide the task of decimation, and it's your goal to >find which architecture suits your system requirements best. > > > >-- > >Alexander >
Thank you, it was very helpful. Now I have to read this documents. All of the above made &#8203;&#8203;me realize that there is no particular architecure for this kind of decimation. Again thank you all for your replies.
>On Apr 26, 9:38=A0am, "slayerz13" <slay_13@n_o_s_p_a_m.hotmail.com> >wrote: >> >On 04/21/2011 11:13 PM, slayerz13 wrote: > >> >> Thank you for the explanation. >> >> But I don't sure to understand why does the output signal will have >> very >> >> low energy for the high frequencies (if I don't perform a second >> decimation >> >> by the FIR inverse sinc) >> >> >Then you don't understand what a filter does! =A0 > >> in fact, I did not understand the meaning of your sentence. >> I have a pretty good background in signal processing, but everything
abou=
>t >> digital filtering (and especially the methods of multirate signal >> processing), I have not had proper training. > >Well, any decent intro course on DSP will comprise some 40%-60% >material on filters. That's the first application that is >discussed in such a class, after one has dealt with the >theorethical basics. > >So your claim that you "have a pretty good background in signal >processing" doesn't quite add up with the statement that you >"have not had proper training" wrt filters... > >Rune >
You're absolutely right. when I say signal processing, I was thinking to the lessons of digital communication, information theory, kind of modulation, demodulation, coding, etc. ... I had a more mathematical than practical training. But now I am still a student, and I have to learn these skills on multirate signal processing. I do not want to pretend I'm a pro in signal processing, I still have much to learn.