On Mon, 03 Oct 2011 13:40:59 -0700, steve wrote:> On Oct 3, 1:06 pm, Tim Wescott <t...@seemywebsite.com> wrote: > >> The oversample-and-average technique actually doesn't reduce >> quantization noise by itself: if you had an infinitely quiet ADC front >> end then the quantization noise would come through unscathed. > > that's only true for DC inputs, which the OP states is not under > consideration > > quantization noise is most often modeled as just broad band noise > extending way past fs/2, with no oversampling most of the noise power is > folded back into the analysis band (1.5k to 350k ), oversampling just > increases the folding frequency, thus reducing the amount of high > frequency aliased noise (from any source) folded back into the analysis > bandThe OP states a bandwidth, but doesn't say where his signals usually lie. If the nature of the input is unknown, or if you're operating in closed loop, the conservative way to estimate quantization noise is as a square wave concentrated at the worst possible frequency. This is more valid for closed-loop operation -- because the system will often oscillate at or very close to that frequency -- but it also covers your bases for a general system that might see a small tone at any frequency. "That could be a problem but it's very likely that it won't happen" is, in my book with "This will pass all qualification tests and then crop up as a problem when the World's Pickiest Customer is using the system". -- www.wescottdesign.com
Oversampling technique need help...
Started by ●September 29, 2011
Reply by ●October 3, 20112011-10-03
Reply by ●October 3, 20112011-10-03
On Oct 3, 2:26=A0pm, Tim Wescott <t...@seemywebsite.com> wrote:> On Mon, 03 Oct 2011 13:40:59 -0700, steve wrote: > > On Oct 3, 1:06=A0pm, Tim Wescott <t...@seemywebsite.com> wrote: > > >> The oversample-and-average technique actually doesn't reduce > >> quantization noise by itself: if you had an infinitely quiet ADC front > >> end then the quantization noise would come through unscathed. > > > that's only true for DC inputs, which the OP states is not under > > consideration > > > quantization noise is most often modeled as just broad band noise > > extending way past fs/2, with no oversampling most of the noise power i=s> > folded back into the analysis band (1.5k to 350k ), oversampling just > > increases the folding frequency, thus reducing the amount of high > > frequency aliased noise (from any source) folded back into the analysis > > band > > The OP states a bandwidth, but doesn't say where his signals usually lie. > > If the nature of the input is unknown, or if you're operating in closed > loop, the conservative way to estimate quantization noise is as a square > wave concentrated at the worst possible frequency. =A0This is more valid > for closed-loop operation -- because the system will often oscillate at > or very close to that frequency -- but it also covers your bases for a > general system that might see a small tone at any frequency. > > "That could be a problem but it's very likely that it won't happen" is, > in my book with "This will pass all qualification tests and then crop up > as a problem when the World's Pickiest Customer is using the system". > > --www.wescottdesign.com- Hide quoted text - > > - Show quoted text -I thought it was pretty clear that the OP had a non-DC band limited signal well below Nyquist. He=92s asking for approaches and techniques to approach designs like this. We can probably agree that for given N, a flash converter with a higher sample rate will have a lower noise density. The OP wants to use this information to develop his system. He now knows that he can use this info to select his A/D for both sample rate and N bits to optimize his noise floor. He may not yet know exactly how, but he knows it can be done. What we really haven=92t talked about, although Tim may have been making an attempt, is what will happen when he gets a large signal into his acquisition. Or he gets a small single tone signal into his acquisition and it creates a bigger spur than the large signal =85 left to the interested student. Regards
Reply by ●October 4, 20112011-10-04
On 10/3/2011 5:26 PM, Tim Wescott wrote:> On Mon, 03 Oct 2011 13:40:59 -0700, steve wrote: > >> On Oct 3, 1:06 pm, Tim Wescott<t...@seemywebsite.com> wrote: >> >>> The oversample-and-average technique actually doesn't reduce >>> quantization noise by itself: if you had an infinitely quiet ADC front >>> end then the quantization noise would come through unscathed. >> >> that's only true for DC inputs, which the OP states is not under >> consideration >> >> quantization noise is most often modeled as just broad band noise >> extending way past fs/2, with no oversampling most of the noise power is >> folded back into the analysis band (1.5k to 350k ), oversampling just >> increases the folding frequency, thus reducing the amount of high >> frequency aliased noise (from any source) folded back into the analysis >> band > > The OP states a bandwidth, but doesn't say where his signals usually lie. > > If the nature of the input is unknown, or if you're operating in closed > loop, the conservative way to estimate quantization noise is as a square > wave concentrated at the worst possible frequency. This is more valid > for closed-loop operation -- because the system will often oscillate at > or very close to that frequency -- but it also covers your bases for a > general system that might see a small tone at any frequency. > > "That could be a problem but it's very likely that it won't happen" is, > in my book with "This will pass all qualification tests and then crop up > as a problem when the World's Pickiest Customer is using the system".It is appropriate again to explain Murphy's Law. "If anything can go wrong, it will" is not the creed of a pessimist, but a warning from an experienced engineer. He could have said at greater length, "If the system allows something bad to happen, rest assured that that bad thing will eventually happen. Jerry -- Engineering is the art of making what you want from things you can get.
Reply by ●October 5, 20112011-10-05
Hello all, I finally found an article from TI to help me to calculate the noise factor of my analog chain. http://www.ti.com/lit/an/slyt094/slyt094.pdf For sum up, to reduce the noise in my bandwidth, I need to optimize the noise factor of my analog chain. The oversampling process with averaging permit to reduce the white noise in the band of interest which come from the analog chain AND quantization noise from the ADC. For my final board, I have 8 voices to place on the PCB, and it will be difficult to keep my actual design (need more space). So I thought that I could remove the Bessel filter and make the filtering with the FPGA. Do you think it is a good idea ? For a low pass FIR filter, how I can do to estimate the number of cells that the filter will take in the FPGA ? (The FPGA used would probably be an ALTERA Arria II GZ. PS :I have some difficulties to read your message : I mean that some special characters doesn't seem to pass on the forum, is it normal ? regards
Reply by ●October 5, 20112011-10-05
On Oct 5, 5:03�am, "glias" <glias37@n_o_s_p_a_m.hotmail.com> wrote:> Hello all, > I finally found an article from TI to help me to calculate the noise factor > of my analog chain. > > http://www.ti.com/lit/an/slyt094/slyt094.pdf > > For sum up, to reduce the noise in my bandwidth, I need to optimize the > noise factor of my analog chain. The oversampling process with averaging > permit to reduce the white noise in the band of interest which come from > the analog chain AND quantization noise from the ADC. > > For my final board, I have 8 voices to place on the PCB, and it will be > difficult to keep my actual design (need more space). So I thought that I > could remove the Bessel filter and make the filtering with the FPGA. > Do you think it is a good idea ? > For a low pass FIR filter, how I can do to estimate the number of cells > that the filter will take in the FPGA ? (The FPGA used would probably be an > �ALTERA Arria II GZ. > > PS :I have some difficulties to read your message : I mean that some > special characters doesn't seem to pass on the forum, is it normal ? > > regardsbe aware, most practical noise issues do not originate from the noise sources listed in that paper, noise from nearby switching power supplies, external EMI, ground loops, clocks etc all require different solutions, mostly guidelines are used to minimized these problems during design (guardbands, EMI doghouses, seperate power planes etc) , but they, for the most part, cannot be quantified or simulated or predicted (interactions are too complex).
Reply by ●October 5, 20112011-10-05
On Oct 5, 2:03�am, "glias" <glias37@n_o_s_p_a_m.hotmail.com> wrote:> Hello all, > I finally found an article from TI to help me to calculate the noise factor > of my analog chain. > > http://www.ti.com/lit/an/slyt094/slyt094.pdf > > For sum up, to reduce the noise in my bandwidth, I need to optimize the > noise factor of my analog chain. The oversampling process with averaging > permit to reduce the white noise in the band of interest which come from > the analog chain AND quantization noise from the ADC. > > For my final board, I have 8 voices to place on the PCB, and it will be > difficult to keep my actual design (need more space). So I thought that I > could remove the Bessel filter and make the filtering with the FPGA. > Do you think it is a good idea ? > For a low pass FIR filter, how I can do to estimate the number of cells > that the filter will take in the FPGA ? (The FPGA used would probably be an > �ALTERA Arria II GZ. > > PS :I have some difficulties to read your message : I mean that some > special characters doesn't seem to pass on the forum, is it normal ? > > regardsRe filtering: Based on what I think I know re your system, I would suggest that you keep your DC block and a functional Nyquist filter in front of the A/ D. Implementation could be simple R-C filters, just make sure you meet your attenuation spec at Nyquist or more importantly the frequency at which stuff starts to fold back into your analysis window. This is especially important when making tradeoff�s for space. Your final analysis filter certainly could be done in the FPGA. I would suggest that you visit the Altera or Xilinx sites to answer your questions re cell count. My other suggestion is to pay attention to your layout --- especially if you�re placing your high gain amp in a digital environment. Re the weird stuff: Could be my text editor. I don�t see what you�re talking about. Regards
Reply by ●October 5, 20112011-10-05
On Wed, 05 Oct 2011 04:03:48 -0500, glias wrote:> Hello all, > I finally found an article from TI to help me to calculate the noise > factor of my analog chain. > > http://www.ti.com/lit/an/slyt094/slyt094.pdf > > For sum up, to reduce the noise in my bandwidth, I need to optimize the > noise factor of my analog chain. The oversampling process with averaging > permit to reduce the white noise in the band of interest which come from > the analog chain AND quantization noise from the ADC. > > For my final board, I have 8 voices to place on the PCB, and it will be > difficult to keep my actual design (need more space). So I thought that > I could remove the Bessel filter and make the filtering with the FPGA. > Do you think it is a good idea ?It's certainly an approach that I'd want to investigate. Whether I'd take it in the end depends on what I found, but that's usually how things fall out.> For a low pass FIR filter, how I can do to estimate the number of cells > that the filter will take in the FPGA ? (The FPGA used would probably be > an > ALTERA Arria II GZ.Consider alternatives to a whomping big FIR filter in the FPGA. If you're oversampling, you may want to start by implementing a CIC filter (which can be implemented quite efficiently) and knocking down the sampling rate, then following that with a FIR or an IIR filter. -- www.wescottdesign.com
