1-bit ADC for RF, is it possible?

Jerry Avins wrote:

> Oliver Faust wrote:
> 
>   ...
> 
> 
>> As I understand it in "normal" receiver systems we have similar
>> problems. To transfer the RF signal into an intermediate frequency
>> (IF) signal we use an analogue voltage controlled oscillator (VCO). I
>> guess this frequency generator will introduce similar jitter.
>> (jitter=jitter*f_c (RF)). But for "normal" systems the sampling clock
>> represents a second jitter source. According to your formula this
>> clock will introduce: jitter=jitter*f_IF.
>> The system I propose goes away with the jitter source located in the
>> analogue tuner. There is only the sampling clock left. The down mixing
>> in the digital domain won't introduce any additional jitter. Now the
>> question is:
>> Is the jitter for the sampler in the new system harder to control than
>> in a "normal" receiver?
>> I doubt that, because to tune to a specific frequency in an analogue
>> tuner a voltage controlled oscillator is used. I guess that such a VCO
>> will introduce more jitter then a fixed sampling frequency.
> 
> 
> Jitter in modulators and demodulators is often referred to phase noise.
                                                          as ^
> A-to-D concerters have an uncertainty in the time between a command to
                                                       when ^
> sample is given, and when the sample is actually taken. Converters
> intended for use at higher frequencies have smaller uncertainties. Even
> though it is capable of the necessary sampling rate, a given converter
> may not have small enough "aperture" uncertainty to successfully sample
> a narrow band on a high-frequency carrier.
> 
> Jerry
-- 
Engineering is the art of making what you want from things you can get.
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Hi Jerry,

"Jerry Avins" <jya@ieee.org> wrote in message
news:3fe12f4e$0$4739$61fed72c@news.rcn.com...
> What am I missing? Sigma-delta converters provide exactly the same
> outputs as successive-approximation or flash designs except for
> increased latency that renders them unsuitable for certain applications.
> They trade in complexity for speed, just as a serial adder is less
> complex than a parallel adder, but needs to run faster. Just as a sum is
> a sum, so is a conversion a conversion. That the optimum circuit
> configuration depends on the specifics of sampling rate and latency need
> should be no surprise. Engineering is like that.

That's pretty much correct in the baseband ADC case, except that S-D
converters don't have the same set of practical engineering problems as
traditional converters.

For the other cases, including bandpass converters, it's useful the break up
the S-D converter into its constituent parts:

1) An S-D modulator creates a wideband binary digital signal that matches
the target signal within the target band; and

2) A reconstruction filter that filters out everything except the target
band.

If the converter is a DAC, then the target signal is typically
discrete-time, multibit, critically sampled within the target band, and the
reconstruction filter is analog.  If the converter is an ADC, then the
target signal is analog, and the reconstruction filter is a digital
decimator.  In both cases, the effective number of bits depends on the ratio
between the target band width and the clock frequency of the binary signal.
Note that in both cases, there isn't any low-frequency "sampling clock" for
the narrowband signal.

In an ADC, both parts (1) and (2) are tough to do at RF frequencies.  And
even in "undersampled" scenario, if you don't frequency-convert the signal
first, then I think you really have to run your binary clock near or above
the target band center frequency to get enough energy from the modulated
signal into the target band.  At those frequencies, the analog parts of (1),
and the decimating filter in (2) are both tough to manage.

For an RF power amp, though, things are very different.  Think of a class C
RF amp -- the exciter applies a high power half-wave signal to an analog
filter connected directly to the antenna.  The filter filters out all the
crufty harmonics from the exciter to leave clean RF.

Now, for an S-D DAC, (1) is all-digital, and if the binary clock is really
fast compared to the target band width, then you can vastly simplify the
required calculations.  I don't think it would be too tough, for example, to
get fs into a GSM band.  To transmit, then, you would just take your
baseband signal, pass it through (1), and apply the resulting binary signal
to a high power class C exciter.  The antenna filter becomes the
reconstruction filter (2), by passing only the image of the baseband signal
around fs!

Now you have an RF modulating power amp that's as good as linear, using only
simple analog circuitry.  And it's highly efficient, because it's always
full-on or off, so it doesn't theoretically need to dissipate any power
internally.

> 
> Jitter in modulators and demodulators is often referred to phase noise.
> A-to-D concerters have an uncertainty in the time between a command to
> sample is given, and when the sample is actually taken. Converters
> intended for use at higher frequencies have smaller uncertainties. Even
> though it is capable of the necessary sampling rate, a given converter
> may not have small enough "aperture" uncertainty to successfully sample
> a narrow band on a high-frequency carrier.
> 
> Jerry

That means the limiting requirement, if you want to sample a small
band within the RF domain, is this uncertainty in the setup time. I
will ask my front-end designer about the setup time uncertainty in his
chip.

Oliver

> For RF transmission, I think sigma-delta techniques are a very big deal...

From what I understand all S-D converters use a feedback loop.
Basically this loop is used to trade sampling frequency with dynamic
range. Without this feedback loop the system is a simple sampler with
a 1-bit quantizer. My question concerned exactly such a system.
Unfortunately I did not know that the term "1-bit ADC" is so heavily
connected with S-D converters and not with simple samplers with 1-bit
quantizers.
The reason why I have proposed such a simple system was the sampling
speed and the processing complexity. With one bit precision we can
achieve higher sampling frequencies then with multiple bits. The
digital multiplications required for the down conversion reduce to
mere sign bit manipulations.

Oliver

Oh, you mean just a comparator without any noise shaping...  I can't imagine
any situation in which you would actually want to do that.  That
rate/resolution tradeoff you're thinking of stops working when the
quantization noise gets large compared to the noise/sample in the signal,
i.e., way before you get down to 1-bit resolution, unless you inject some
dithering noise into the signal.  And your processing requirements would be
exceedingly high for filtering that 1-bit signal.  And all your channel
selection filtering would have to be done with analog circuitry to reduce
aliasing, which means you would probably be sampling a baseband or IF signal
anyway... why don't you just use an off-the-shelf ADC?

Oliver Faust wrote:

>>For RF transmission, I think sigma-delta techniques are a very big deal...
> 
> 
> From what I understand all S-D converters use a feedback loop.
> Basically this loop is used to trade sampling frequency with dynamic
> range. Without this feedback loop the system is a simple sampler with
> a 1-bit quantizer. My question concerned exactly such a system.
> Unfortunately I did not know that the term "1-bit ADC" is so heavily
> connected with S-D converters and not with simple samplers with 1-bit
> quantizers.
> The reason why I have proposed such a simple system was the sampling
> speed and the processing complexity. With one bit precision we can
> achieve higher sampling frequencies then with multiple bits. The
> digital multiplications required for the down conversion reduce to
> mere sign bit manipulations.
> 
> Oliver

You can sample at higher speeds that way, but the signal-to-noise ratio
suffers. If course, you can oversample and average to get some of the
SNR back, but the trade-off isn't usually favorable. Knowing only
whether the carrier is positive or negative tells you very little about
the modulation.

Jerry
-- 
Engineering is the art of making what you want from things you can get.
�����������������������������������������������������������������������

> 
> You can sample at higher speeds that way, but the signal-to-noise ratio
> suffers. If course, you can oversample and average to get some of the
> SNR back, but the trade-off isn't usually favorable. Knowing only
> whether the carrier is positive or negative tells you very little about
> the modulation.
> 
> Jerry

I compared the SNR for a conventional ADC with the SNR gain we get
from an over sampling system. For the calculation a uniform
distribution of the input signal was assumed and the quantizer levels
where matched to the input range. With those assumptions I arrived at
the following result:
2^(2B1)=2^(2B2)*fs/B
where B1 is precision in bits of a normal ADC and B2 is the precision
of an over sampling system, B is the bandwidth of the signal of
interest and fs is the sampling frequency. Taking the log_2 results in
B1=B2+0.5*log_2(fs/B)
In the case of the example I have given, B1=1, B=1MHz and fs=200MHz
the resulting precision is:
B1=1+0.5*log_2(200)=4.8bits
That means even with 200 times over sampling we gain only 3.8
precision bits. This is a rather not satisfying result. But for the
normal ADC system we have assumed optimal conditions, i.e. a uniform
distributed input signal. I wonder how the ratio looks like if we
assume the input signal to be Gaussian distributed, which is normally
the case for communication systems. I guess one bit quantizing will
have some advantages, because it is indifferent against the shape of
the input distribution, as long as the mean is zero.

Oliver

> Oh, you mean just a comparator without any noise shaping...  I can't imagine
> any situation in which you would actually want to do that.  That
> rate/resolution tradeoff you're thinking of stops working when the
> quantization noise gets large compared to the noise/sample in the signal,
> i.e., way before you get down to 1-bit resolution, unless you inject some
> dithering noise into the signal.  And your processing requirements would be
> exceedingly high for filtering that 1-bit signal.  And all your channel
> selection filtering would have to be done with analog circuitry to reduce
> aliasing, which means you would probably be sampling a baseband or IF signal
> anyway... why don't you just use an off-the-shelf ADC?

I was thinking about the processing problem too. The frequency shift
operation has to be carried out with the sampling frequency, but the
filtering can be done on a much lower sample speed. The filtering is a
decimation operation and therefore we can borrow some techniques form
multirate signal processing and perform the down sampling within the
filter. This reduces the processing speed required for the filter by
the down sampling factor.
The main idea of that proposed system is that the channel selection
can be done in the digital domain, because the high sampling frequency
allows for that. The anti-alias filter would be the antenna itself,
because this device has roughly the frequency response of a band-pass
filter. Even if we get alias components, these will fall into a band
which is not of interest. To support this statement I will fall back
at the example system described previously.
B=1MHz, fs=200MHz, fc=50MHz, fa=110MHz.
Where B / fc is the bandwidth / centre frequency of the signal of
interest, fs is the sampling frequency and fa is the frequency of an
unwanted signal.
After the analogue to digital conversion the unwanted signal appears
at 10MHz in frequency domain of the resulting digital signal
(aliasing). Our signal of interest is still centred at 50MHz. The
frequency shift operation, which will shift the signal of interest
into the base-band will also affect the unwanted signal component. But
the distance in frequency between these two signals won't be affected
because the shift operation is circular within the sampling frequency
range. That means the unwanted signal will appear at 40MHz after the
shift operation. Now it is easy to filter the unwanted signal
component with the decimation LP.

Oliver

"Oliver Faust" <newsgroup_faust@web.de> wrote in message
news:e33b6813.0312202114.7511377@posting.google.com...
> [...]
> The anti-alias filter would be the antenna itself,
> because this device has roughly the frequency response of a band-pass
> filter. Even if we get alias components, these will fall into a band
> which is not of interest. To support this statement I will fall back
> at the example system described previously.
> B=1MHz, fs=200MHz, fc=50MHz
> [...]

There is an simple information-theoretic argument that says you need a
narrower anti-alias filter:

If your channel bandwidth is 1MHz, and your anti-alias filter passes 100MHz,
then there are 100 channels that might be selected by your digital low-pass.
Your sampler gives you a 200 Mbps stream of information about the entire
band, so if the entire band is being used by independent channels, you can
extract no more than 2Mbps of information about each particular channel on
average.  So if you decimate to 2Mhz for critical sampling, you can expect
no more than 1 bit accuracy per sample.

In practice, you would do a lot worse unless you explicitly designed and
used an appropriate channel coding.  You can also expect significant
deterioration as you move away from the transmitter or toward interfering
sources, because stronger unwanted channels would affect your system much
the same way that more unwanted channels do.

The noise from a 1-bit quantizer is proportional to the power of the entire
signal being quantized, and it's usually pretty white, so the quantization
noise in your channel is also proportional to the total signal power.

Oliver Faust wrote:

>>Oh, you mean just a comparator without any noise shaping...  I can't imagine
>>any situation in which you would actually want to do that.  That
>>rate/resolution tradeoff you're thinking of stops working when the
>>quantization noise gets large compared to the noise/sample in the signal,
>>i.e., way before you get down to 1-bit resolution, unless you inject some
>>dithering noise into the signal.  And your processing requirements would be
>>exceedingly high for filtering that 1-bit signal.  And all your channel
>>selection filtering would have to be done with analog circuitry to reduce
>>aliasing, which means you would probably be sampling a baseband or IF signal
>>anyway... why don't you just use an off-the-shelf ADC?
> 
> 
> I was thinking about the processing problem too. The frequency shift
> operation has to be carried out with the sampling frequency, but the
> filtering can be done on a much lower sample speed. The filtering is a
> decimation operation and therefore we can borrow some techniques form
> multirate signal processing and perform the down sampling within the
> filter. This reduces the processing speed required for the filter by
> the down sampling factor.

You need an enormous number of +/- samples with no amplitude information 
into a filter to get a nice waveform out. If it can be done at all, it 
must be one of the most processing-intensice ways imaginable. How often 
must you measure and calculate upon the sign of a carrier in order to 
extract the modulation on it? You seem to be captured by wishful thinking.

> The main idea of that proposed system is that the channel selection
> can be done in the digital domain, because the high sampling frequency
> allows for that. The anti-alias filter would be the antenna itself,
> because this device has roughly the frequency response of a band-pass
> filter. Even if we get alias components, these will fall into a band
> which is not of interest. To support this statement I will fall back
> at the example system described previously.

Most antennas respond well to second and higher harmonics. The 
selectivity curves in the book rarely include the second octave.

> B=1MHz, fs=200MHz, fc=50MHz, fa=110MHz.
> Where B / fc is the bandwidth / centre frequency of the signal of
> interest, fs is the sampling frequency and fa is the frequency of an
> unwanted signal.
> After the analogue to digital conversion the unwanted signal appears
> at 10MHz in frequency domain of the resulting digital signal
> (aliasing). Our signal of interest is still centred at 50MHz.

The "signal" will have most of the modulation stripped from it.

>  The
> frequency shift operation, which will shift the signal of interest
> into the base-band will also affect the unwanted signal component. But
> the distance in frequency between these two signals won't be affected
> because the shift operation is circular within the sampling frequency
> range. That means the unwanted signal will appear at 40MHz after the
> shift operation. Now it is easy to filter the unwanted signal
> component with the decimation LP.
> 
> Oliver

Jerry
-- 
Engineering is the art of making what you want from things you can get.
�����������������������������������������������������������������������