Well, it's a very simple question but I need to ask. When we implement a symbol timing PLL, why do we skip or stuff a sample during symbol synchronization (based on the relative clock speed) when we are already implementing a second-order filter in the timing PLL? Was not the purpose of 2nd order filter to track and follow the clock frequency mismatch automatically? Thank you.
Stuffing/Skipping in symbol timing synchronization
Started by ●April 11, 2012
Reply by ●April 11, 20122012-04-11
On Wed, 11 Apr 2012 06:48:18 -0500, "commsignal" <commsignal@n_o_s_p_a_m.yahoo.com> wrote:>Well, it's a very simple question but I need to ask. When we implement a >symbol timing PLL, why do we skip or stuff a sample during symbol >synchronization (based on the relative clock speed) when we are already >implementing a second-order filter in the timing PLL? Was not the purpose >of 2nd order filter to track and follow the clock frequency mismatch >automatically? > >Thank you.It sounds like what you're looking at is a specific implementation, since it isn't always necessary to do something with that description. I suspect the way to get an answer your question is to ask someone who understands your specific system very well or the original implementer. Eric Jacobsen Anchor Hill Communications www.anchorhill.com
Reply by ●April 11, 20122012-04-11
On Wed, 11 Apr 2012 15:41:15 GMT, eric.jacobsen@ieee.org (Eric Jacobsen) wrote:>On Wed, 11 Apr 2012 06:48:18 -0500, "commsignal" ><commsignal@n_o_s_p_a_m.yahoo.com> wrote: > >>Well, it's a very simple question but I need to ask. When we implement a >>symbol timing PLL, why do we skip or stuff a sample during symbol >>synchronization (based on the relative clock speed) when we are already >>implementing a second-order filter in the timing PLL? Was not the purpose >>of 2nd order filter to track and follow the clock frequency mismatch >>automatically? >> >>Thank you. > >It sounds like what you're looking at is a specific implementation, >since it isn't always necessary to do something with that description. >I suspect the way to get an answer your question is to ask someone who >understands your specific system very well or the original >implementer. > >And, of course, right after I posted I think I figured out what you may have meant. If your system does not have a resampling filter that can be steered by the loop or the loop does not steer the sampling clock, then the only way to adjust the "phase" of the symbol timing is to skip or stuff samples. That's a fairly inelegant way to do it, but it is sometimes done and can be made to work reasonably well, especially if the oversampling rate is very high. Eric Jacobsen Anchor Hill Communications www.anchorhill.com
Reply by ●April 11, 20122012-04-11
>On Wed, 11 Apr 2012 15:41:15 GMT, eric.jacobsen@ieee.org (Eric >Jacobsen) wrote: > >>On Wed, 11 Apr 2012 06:48:18 -0500, "commsignal" >><commsignal@n_o_s_p_a_m.yahoo.com> wrote: >> >>>Well, it's a very simple question but I need to ask. When we implementa>>>symbol timing PLL, why do we skip or stuff a sample during symbol >>>synchronization (based on the relative clock speed) when we are already >>>implementing a second-order filter in the timing PLL? Was not thepurpose>>>of 2nd order filter to track and follow the clock frequency mismatch >>>automatically? >>> >>>Thank you. >> >>It sounds like what you're looking at is a specific implementation, >>since it isn't always necessary to do something with that description. >>I suspect the way to get an answer your question is to ask someone who >>understands your specific system very well or the original >>implementer. >> >> > >And, of course, right after I posted I think I figured out what you >may have meant. > >If your system does not have a resampling filter that can be steered >by the loop or the loop does not steer the sampling clock, then the >only way to adjust the "phase" of the symbol timing is to skip or >stuff samples. That's a fairly inelegant way to do it, but it is >sometimes done and can be made to work reasonably well, especially if >the oversampling rate is very high. > > >Eric Jacobsen >Anchor Hill Communications >www.anchorhill.com >I remember finding some paper on a farrow filter based timing recovery with a stuffing/skipping operation.
Reply by ●April 11, 20122012-04-11
>On Wed, 11 Apr 2012 15:41:15 GMT, eric.jacobsen@ieee.org (Eric >Jacobsen) wrote: > >>On Wed, 11 Apr 2012 06:48:18 -0500, "commsignal" >><commsignal@n_o_s_p_a_m.yahoo.com> wrote: >> >>>Well, it's a very simple question but I need to ask. When we implementa>>>symbol timing PLL, why do we skip or stuff a sample during symbol >>>synchronization (based on the relative clock speed) when we are already >>>implementing a second-order filter in the timing PLL? Was not thepurpose>>>of 2nd order filter to track and follow the clock frequency mismatch >>>automatically? >>> >>>Thank you. >> >>It sounds like what you're looking at is a specific implementation, >>since it isn't always necessary to do something with that description. >>I suspect the way to get an answer your question is to ask someone who >>understands your specific system very well or the original >>implementer. >> >> > >And, of course, right after I posted I think I figured out what you >may have meant. > >If your system does not have a resampling filter that can be steered >by the loop or the loop does not steer the sampling clock, then the >only way to adjust the "phase" of the symbol timing is to skip or >stuff samples. That's a fairly inelegant way to do it, but it is >sometimes done and can be made to work reasonably well, especially if >the oversampling rate is very high. > > >Eric Jacobsen >Anchor Hill Communications >www.anchorhill.com >Thank you Eric and jacobfenton.
Reply by ●April 12, 20122012-04-12
>>On Wed, 11 Apr 2012 15:41:15 GMT, eric.jacobsen@ieee.org (Eric >>Jacobsen) wrote: >> >>>On Wed, 11 Apr 2012 06:48:18 -0500, "commsignal" >>><commsignal@n_o_s_p_a_m.yahoo.com> wrote: >>> >>>>Well, it's a very simple question but I need to ask. When we implement >a >>>>symbol timing PLL, why do we skip or stuff a sample during symbol >>>>synchronization (based on the relative clock speed) when we arealready>>>>implementing a second-order filter in the timing PLL? Was not the >purpose >>>>of 2nd order filter to track and follow the clock frequency mismatch >>>>automatically? >>>> >>>>Thank you. >>> >>>It sounds like what you're looking at is a specific implementation, >>>since it isn't always necessary to do something with that description. >>>I suspect the way to get an answer your question is to ask someone who >>>understands your specific system very well or the original >>>implementer. >>> >>> >> >>And, of course, right after I posted I think I figured out what you >>may have meant. >> >>If your system does not have a resampling filter that can be steered >>by the loop or the loop does not steer the sampling clock, then the >>only way to adjust the "phase" of the symbol timing is to skip or >>stuff samples. That's a fairly inelegant way to do it, but it is >>sometimes done and can be made to work reasonably well, especially if >>the oversampling rate is very high. >> >> >>Eric Jacobsen >>Anchor Hill Communications >>www.anchorhill.com >> > >Thank you Eric and jacobfenton.Another question which arises from this is that since we have to use a mechanism for stuffing/skipping the samples anyway, does our loop have to be a PI filter necessarily, or a Proportional only would do?
