Even though there is a BPF before ADC, to do decimation without the noise/not-fully-attenuated suprious/interference signal to be fold back to your new nyquist band, you need Low pass filtering! I'll down-mix my signal to DC by I/Q then why not low pass? Even I do not bring it down to DC, I can still keep all the spectrum contents from DC to my highest frequency components after being aliased to Hz level, and a low pass will still work, right? I think you are the only guy here not following at all.. On Monday, September 24, 2012 6:01:48 PM UTC-4, rickman wrote:> I'm not suggesting that you do it this way, I am talking about analysis. > > You said there is a band pass filter before the ADC, so why would you > > need a filter before the decimation? BTW, if you add a digital filter, > > it won't be a low pass. It would be a band pass since the signal is not > > at the low frequency until after you do the decimation and then it is > > too late. > > > > So do you need additional filtering or is your analog band pass adequate? > > > > I repeat my question. In terms of the resulting signal, how is the > > process I described different from what you have described? This should > > help you understand what is going on in your case and what is needed to > > make it work. > > > > Rick > > > > > > On 9/23/2012 9:51 PM, nick cake wrote: > > > LOL I would really like this idea if they don't care about $$$ and I actually worked with 3.6GHz sampling. But the raw dropping probably won't work cause serious LP filtering would be needed before decimation, right? > > > > > > On Sunday, September 23, 2012 7:22:28 PM UTC-4, rickman wrote: > > >> On 9/23/2012 5:15 PM, nick cake wrote: > > >> > > >>> Hi sampling gurus, > > >> > > >>> > > >> > > >>> I'm thinking about undersampling a 150Hz AM signal modulated to a 330MHz carrier, thus the signal bandwidth is 300Hz. I found an ADC has 600MHz analogue bandwidth, and minimum Fs to be 5.1kHz. Suppose the bandpass filter is sharp enough for my my signal at 330MHz, if I use 5kHz to sample the 330MHz, will there be any problem? > > >> > > >>> > > >> > > >>> One of my colleagues thinks there's a sinc roll-off associates with undersampling thus one cannot use very large undersampling factor. This is true for stealing higher harmonics out of a low Fs driven DAC, but I don't think this is true for ADC. > > >> > > >>> > > >> > > >>> As I understand, the ADC can be modeled as: > > >> > > >>> 1. Sampling: multiply input continuous signal with a series of Diract implues > > >> > > >>> 2. Hold： time domain convolution with a rect window, whose width is maximally Ts (and whose freq domain is a sinc, with first null at Fs) > > >> > > >>> 3. A-to-D: convert the held stable voltage to digital output using proper coding > > >> > > >>> > > >> > > >>> The aliasing effect due to undersampling happens in the 1st step, thus the 330MHz has already been "down-converted" to baseband to 601.2Hz, and my two AM bands will be at 451.2 and 751.2 respectively. Then the hold operation simply "mask" the frequency spectrum by a sinc shape and my 601.2Hz signal will be almost intact. > > >> > > >>> > > >> > > >>> Thus I won't need to do large factor decimation/filtering and save a lot of FPGA resources. > > >> > > >>> > > >> > > >>> Is this practically feasible? I asked a couple of engineers and they are not very sure.. > > >> > > >> > > >> > > >> Consider the difference between your analysis and this... > > >> > > >> > > >> > > >> Sample by flash converter at 1 GHz so that your carrier is well below > > >> > > >> the Nyquist rate. Then you drop 199,999 out of 200,000 samples to get a > > >> > > >> 5 kHz sample rate. How is this different from what you have described > > >> > > >> (assuming I did the ratio right :-)? > > >> > > >> > > >> > > >> Rick > > >
Is it possible to use very large undersampling factor (using 5.1kHz to sample 330MHz)?
Started by ●September 23, 2012
Reply by ●September 24, 20122012-09-24
Reply by ●September 24, 20122012-09-24
Hi Eric, Thanks so much for showing me such a nice illustration of those abstract theory behind sampling! I tried to google such answers before came to pose the question here.. Also as you suggests that as Fs goes higher, the jitter matters more, thus may I say by using a lower Fs the jitter impact on aperture uncertainty is less? Thanks in advance! On Monday, September 24, 2012 6:54:03 PM UTC-4, Eric Jacobsen wrote:> On Sun, 23 Sep 2012 14:15:04 -0700 (PDT), nick cake > > <> wrote: > > > > >Hi sampling gurus, > > > > > >I'm thinking about undersampling a 150Hz AM signal modulated to a 330MHz ca= > > >rrier, thus the signal bandwidth is 300Hz. I found an ADC has 600MHz analog= > > >ue bandwidth, and minimum Fs to be 5.1kHz. Suppose the bandpass filter is s= > > >harp enough for my my signal at 330MHz, if I use 5kHz to sample the 330MHz,= > > > will there be any problem? > > > > > >One of my colleagues thinks there's a sinc roll-off associates with undersa= > > >mpling thus one cannot use very large undersampling factor. This is true fo= > > >r stealing higher harmonics out of a low Fs driven DAC, but I don't think t= > > >his is true for ADC. > > > > > >As I understand, the ADC can be modeled as: > > >1. Sampling: multiply input continuous signal with a series of Diract implu= > > >es > > >2. Hold=EF=BC=9A time domain convolution with a rect window, whose width is= > > > maximally Ts (and whose freq domain is a sinc, with first null at Fs) > > >3. A-to-D: convert the held stable voltage to digital output using proper c= > > >oding=20 > > > > > >The aliasing effect due to undersampling happens in the 1st step, thus the = > > >330MHz has already been "down-converted" to baseband to 601.2Hz, and my two= > > > AM bands will be at 451.2 and 751.2 respectively. Then the hold operation = > > >simply "mask" the frequency spectrum by a sinc shape and my 601.2Hz signal = > > >will be almost intact. > > > > > >Thus I won't need to do large factor decimation/filtering and save a lot of= > > > FPGA resources. > > > > > >Is this practically feasible? I asked a couple of engineers and they are no= > > >t very sure.. > > > > It's theoretically possible: > > > > http://www.dsprelated.com/showarticle/175.php > > > > but, as others have mentioned, there are some practical barriers. > > Creating a bandpass filter with <2500Hz BW at 330 MHz will require an > > extremely high Q-factor, which is very difficult to achieve. Also, as > > the center frequency increases the aperture jitter of the sampling > > system becomes important in order to maintain SNR in the sampled > > signal. > > > > > > Eric Jacobsen > > Anchor Hill Communications > > www.anchorhill.com
Reply by ●September 24, 20122012-09-24
On Mon, 24 Sep 2012 17:47:53 -0700, nick cake wrote: (top posting fixed)> > On Monday, September 24, 2012 1:01:29 AM UTC-4, dbd wrote: >> On Sunday, September 23, 2012 2:15:04 PM UTC-7, nick cake wrote: >> >> > Hi sampling gurus, >> >> >> > >> > I'm thinking about undersampling a 150Hz AM signal modulated to a >> > 330MHz carrier, thus the signal bandwidth is 300Hz. I found an ADC >> > has 600MHz analogue bandwidth, and minimum Fs to be 5.1kHz. Suppose >> > the bandpass filter is sharp enough for my my signal at 330MHz, if I >> > use 5kHz to sample the 330MHz, will there be any problem? >> >> >> > >> > ... >> >> >> >> > Is this practically feasible? I asked a couple of engineers and they >> > are not very sure.. >> >> >> >> It is common for beginners to posting in comp.dsp to ask interesting >> theoretical questions followed by the killer question: "Is it >> feasible." It is traditional for the OP to be asked what the whole >> system is and the purpose of the system, because this has a tremendous >> influence on feasibility. (Don't worry, it is also traditional for more >> experienced posters to leave out the necessary description of the whole >> system.) >> >> >> >> On Sunday, September 23, 2012 7:12:22 PM UTC-7, nick cake wrote: >> >> > Hey Tim, >> >> > ... >> >> >> >> > 1. As I said, the Fs I proposed is 5.1KHz, thus the 330MHz will be >> > aliased to somewhere non-DC, thus I can do a I/Q down-conversion >> > easily to DC, but in complex signal. If I use 5kHz, then the 330MHz >> > will be aliased to DC, and the double side band AM will >> > be..overlapped on the 150Hz, correct? If the phase of the AM is of >> > great interest to us ( since it is coupled back from a high power amy >> > to correct the phase distortion in "real-time"), will this overlap >> > kill some of the phase measurement accuracy if we use FFT to get the >> > phase? (actually what we need is a phase difference between two >> > channels) >> >> >> > >> > 2. If we do 5kHz sampling, a 300Hz Bandpass at 330MHz would it be >> > easy to design?? >> >> > ... >> >> >> >> I think that the design of a 300Hz bandwidth filter at 330Mhz will be >> interesting. From your mention of "phase difference", you will >> apparently need two. Will the application require phase matching? Will >> the application require amplitude matching? These are examples of why >> the nature of the rest of the system matters. >> >> >> >> Looking at another type of jitter effects, how accurately is the 330MHz >> carrier generated? For example, a specification of an accuracy 1 part >> per million at 330MHz would put your sidebands typically outside of the >> bandpass 300 Hz centered at a nominal 330MHz. That's one real world >> issue. Another is: Are your two channels from (exactly) to same source >> or do they have independent frequency errors? >> >> >> >> Then, what accuracy (amplitude and delay) do you need in the passband? >> What rejection do you need in the stopband to reject the 600Mhz/5.1KHz >> (or about 120000) noise bands aliased into your samples from the A/D >> input bandwidth? What kind of interference do you need to reject? Even >> specifying the anti-alias filter is an exercise. >> >> >> >> Do you need to widen the passband to account for the range of possible >> frequencies you need to capture? Does that influence the sampling >> frequency required? Lots of questions depend on the details you have >> not yet provided. >> >> >> >> Good luck! >> >> >> >> Dale B. Dalrymple > > Hi Dale, > > Thanks for your great insights by pop out quite a few points to be > clarified! I post this question initially just to confirm that there's > no such sinc attenuation when it comes to undersampling as it was used > in DAC tricks. Then it turns out this is theoretically correct and I > became greedy to know more about implementation.. > > Hey Tauno you are deadly right, it's about ILS and compensation the > phase difference between two generated channels. > > Get back to Dale, yes I guess as many pointed out, a 300Hz at 330MHz BPF > will be a pain in the ass. My point is actually that instead of using > 40MHz sampling, we can use something less, so that to save FPGA > resources/power/processing time.. The 5.1kHz is mentioned as a sort of > extreme example. We surely need to consider the analogy BPF design > easiness to determine the proper Fs. > > I strongly agree that without properly stated the spec of the system, > it's a bit hard to give meaningful answers. But in fact I'm not sure > what exactly the spec is..as I'm not fully involved in the design > process. Just being asked for DSP supports from time to time. So I'll do > my best. > > I believe the two channels are from the same source and wrpt to phase > matching or amplitude matching, I'm not sure what do you mean by that.. > again what we want to do is to couple back a bit of the high power amp > output then detect phase difference between amps in two channels, and > compensate it in the generation signals. Also the AM modulation index > (carrier/side band amp ratio) is of interest, thus I proposed an FFT to > do them at the same shot. What kind of reject to those noise that will > be fold back to baseband I can't really tell..If the only thing present on the output of those high power amps is your signal of interest, then you don't need a bandpass filter. Bandpass filters are necessary in receivers because you can't know what's next to your signal in the spectrum. At the output of a power amplifier you can nearly always figure that what's next to your signal is -- relative silence. This is, of course, not the case if there are multiple signals multiplexed onto one power amplifier. Somehow I suspect this is not the case.> Generally two things I believe is a good news for me: 1. by using a > sampling frequency greatly higher than needed(minimum Fs should be 600Hz > as my AM baseband signal is 150Hz), thus by proper digital filtering and > decimation, there's quite a few processing gain there, right?Your processing gain comes from your ADC sample rate. In this case there's "processing loss" if you will -- you're ignoring a lot of signal that's going by at 330MHz, while getting the full brunt of the ADC noise. But, you're sampling the output of a POWER AMPLIFIER!! If your signal is noisy coming out of _that_ it's not your problem!> 2.Using the same jitter/phase noise grade clock source, generating a > lower frequency signal will have less jitter than a higher frequency > signal, thus using something lower than 40MHz will have less jitter in > the sampling clock if using the same clock source but generating 40MHz, > right?(e.g. simply divide the 40MHz by 2 will reduce the jitter, right?)No. Nu-uh. Nohow. Negatory. False. Wrong. Incorrect. Not right. The phase noise of your signal coming out of the any mixing process will be equal to the phase noise of the component of the local oscillator at the signal frequency. In this case, that's the phase noise _at 330MHz_. That phase noise (in radians) will be the total aperture jitter of the ADC (clock jitter to the ADC plus whatever aperture jitter the ADC throws in free of charge), times 330MHz, times two times pi. So -- aperture jitter times about 2e9. This is sounding pretty bad (I should have done my math before!!). Why not just modulate the thing down to something tractable (even 5kHz) with a regular old local oscillator and mixer, followed by something way fancier than you need (for example, a single-stage RC), then use an el- cheapo ADC?> > I think the steps to go is: > 1. determine how much effort/$ we want to invest in the analog BPF 2. > the minimum Fs is thus determined > > Correct me if I'm not getting at the point!-- My liberal friends think I'm a conservative kook. My conservative friends think I'm a liberal kook. Why am I not happy that they have found common ground? Tim Wescott, Communications, Control, Circuits & Software http://www.wescottdesign.com
Reply by ●September 24, 20122012-09-24
Hi Robert! I did realize what I have committed, thus I'm giving the kHz Fs idea as it's just an example of some sort of extremity. What I want to suggest to our team is to use something lower than the proposed 40MHz.. Fortunately I did have experience with CIC or even sinc filters, so I'll definitely consider it!! Actually I prefer FIR simply because the coefficients can be easily generated in Matlab FDATool and import into Xilinx FIR coregen with minimum manual work. Since the real-time-ness for this system is very loos, say 1s per correction, and I can use time division sharing of the DSP48 blocks so still there's very limited resource required doing an FIR, then why not? CIC's problem is it's droop and bit growth when implementation, thus I need more manual tuning or design effort. Anyway thanks for your reply and hit the point then bring this thread some new breeze! On Monday, September 24, 2012 6:04:51 PM UTC-4, Robert Adams wrote:> You are trying to reduce digital complexity by adding analog complexity (ei the very sharp analog pre-filter). In general this is the opposite of what modern approaches are all about. I don't know if you have much experience with digital filters, but if you naively entered a brick wall filter requirement into Matlab and found you needed a lots of taps, and this drove you to try the under-sampling approach, then I would urge you to read up on multi-rate decimation filters with the early stages of the filter done using a CIC filter and the noble identities (google Hogenauer). I can pretty much guarantee that this will dramatically reduce your fpga requirements and allow you to operate the converter at a higher rate. Some amount of under-sampling may be appropriate, but going to such an extreme is not a good idea. > > > > Bob
Reply by ●September 24, 20122012-09-24
Hi Tim, Wow you are online and get back so quick! I agree that we pretty much (and should) know what should be there after the DAC. But a BPF should be of help isn't it? Well I definitely need to read more about jitter and understand what you just explained in such detail..BTW, the 2e9 is based on what unit? Anyway maybe this is why few people (if any) is using such giant downsampling factor in real design.. For us, the thing is we want minimum analog components in this because the phase difference of the amp is of interest..any more analogue components might bias our estimation.. On Monday, September 24, 2012 9:11:55 PM UTC-4, Tim Wescott wrote:> On Mon, 24 Sep 2012 17:47:53 -0700, nick cake wrote: > > (top posting fixed) > > > > > > On Monday, September 24, 2012 1:01:29 AM UTC-4, dbd wrote: > > >> On Sunday, September 23, 2012 2:15:04 PM UTC-7, nick cake wrote: > > >> > > >> > Hi sampling gurus, > > >> > > >> > > >> > > > >> > I'm thinking about undersampling a 150Hz AM signal modulated to a > > >> > 330MHz carrier, thus the signal bandwidth is 300Hz. I found an ADC > > >> > has 600MHz analogue bandwidth, and minimum Fs to be 5.1kHz. Suppose > > >> > the bandpass filter is sharp enough for my my signal at 330MHz, if I > > >> > use 5kHz to sample the 330MHz, will there be any problem? > > >> > > >> > > >> > > > >> > ... > > >> > > >> > > >> > > >> > Is this practically feasible? I asked a couple of engineers and they > > >> > are not very sure.. > > >> > > >> > > >> > > >> It is common for beginners to posting in comp.dsp to ask interesting > > >> theoretical questions followed by the killer question: "Is it > > >> feasible." It is traditional for the OP to be asked what the whole > > >> system is and the purpose of the system, because this has a tremendous > > >> influence on feasibility. (Don't worry, it is also traditional for more > > >> experienced posters to leave out the necessary description of the whole > > >> system.) > > >> > > >> > > >> > > >> On Sunday, September 23, 2012 7:12:22 PM UTC-7, nick cake wrote: > > >> > > >> > Hey Tim, > > >> > > >> > ... > > >> > > >> > > >> > > >> > 1. As I said, the Fs I proposed is 5.1KHz, thus the 330MHz will be > > >> > aliased to somewhere non-DC, thus I can do a I/Q down-conversion > > >> > easily to DC, but in complex signal. If I use 5kHz, then the 330MHz > > >> > will be aliased to DC, and the double side band AM will > > >> > be..overlapped on the 150Hz, correct? If the phase of the AM is of > > >> > great interest to us ( since it is coupled back from a high power amy > > >> > to correct the phase distortion in "real-time"), will this overlap > > >> > kill some of the phase measurement accuracy if we use FFT to get the > > >> > phase? (actually what we need is a phase difference between two > > >> > channels) > > >> > > >> > > >> > > > >> > 2. If we do 5kHz sampling, a 300Hz Bandpass at 330MHz would it be > > >> > easy to design?? > > >> > > >> > ... > > >> > > >> > > >> > > >> I think that the design of a 300Hz bandwidth filter at 330Mhz will be > > >> interesting. From your mention of "phase difference", you will > > >> apparently need two. Will the application require phase matching? Will > > >> the application require amplitude matching? These are examples of why > > >> the nature of the rest of the system matters. > > >> > > >> > > >> > > >> Looking at another type of jitter effects, how accurately is the 330MHz > > >> carrier generated? For example, a specification of an accuracy 1 part > > >> per million at 330MHz would put your sidebands typically outside of the > > >> bandpass 300 Hz centered at a nominal 330MHz. That's one real world > > >> issue. Another is: Are your two channels from (exactly) to same source > > >> or do they have independent frequency errors? > > >> > > >> > > >> > > >> Then, what accuracy (amplitude and delay) do you need in the passband? > > >> What rejection do you need in the stopband to reject the 600Mhz/5.1KHz > > >> (or about 120000) noise bands aliased into your samples from the A/D > > >> input bandwidth? What kind of interference do you need to reject? Even > > >> specifying the anti-alias filter is an exercise. > > >> > > >> > > >> > > >> Do you need to widen the passband to account for the range of possible > > >> frequencies you need to capture? Does that influence the sampling > > >> frequency required? Lots of questions depend on the details you have > > >> not yet provided. > > >> > > >> > > >> > > >> Good luck! > > >> > > >> > > >> > > >> Dale B. Dalrymple > > > > > > Hi Dale, > > > > > > Thanks for your great insights by pop out quite a few points to be > > > clarified! I post this question initially just to confirm that there's > > > no such sinc attenuation when it comes to undersampling as it was used > > > in DAC tricks. Then it turns out this is theoretically correct and I > > > became greedy to know more about implementation.. > > > > > > Hey Tauno you are deadly right, it's about ILS and compensation the > > > phase difference between two generated channels. > > > > > > Get back to Dale, yes I guess as many pointed out, a 300Hz at 330MHz BPF > > > will be a pain in the ass. My point is actually that instead of using > > > 40MHz sampling, we can use something less, so that to save FPGA > > > resources/power/processing time.. The 5.1kHz is mentioned as a sort of > > > extreme example. We surely need to consider the analogy BPF design > > > easiness to determine the proper Fs. > > > > > > I strongly agree that without properly stated the spec of the system, > > > it's a bit hard to give meaningful answers. But in fact I'm not sure > > > what exactly the spec is..as I'm not fully involved in the design > > > process. Just being asked for DSP supports from time to time. So I'll do > > > my best. > > > > > > I believe the two channels are from the same source and wrpt to phase > > > matching or amplitude matching, I'm not sure what do you mean by that.. > > > again what we want to do is to couple back a bit of the high power amp > > > output then detect phase difference between amps in two channels, and > > > compensate it in the generation signals. Also the AM modulation index > > > (carrier/side band amp ratio) is of interest, thus I proposed an FFT to > > > do them at the same shot. What kind of reject to those noise that will > > > be fold back to baseband I can't really tell.. > > > > If the only thing present on the output of those high power amps is your > > signal of interest, then you don't need a bandpass filter. Bandpass > > filters are necessary in receivers because you can't know what's next to > > your signal in the spectrum. At the output of a power amplifier you can > > nearly always figure that what's next to your signal is -- relative > > silence. > > > > This is, of course, not the case if there are multiple signals > > multiplexed onto one power amplifier. Somehow I suspect this is not the > > case. > > > > > Generally two things I believe is a good news for me: 1. by using a > > > sampling frequency greatly higher than needed(minimum Fs should be 600Hz > > > as my AM baseband signal is 150Hz), thus by proper digital filtering and > > > decimation, there's quite a few processing gain there, right? > > > > Your processing gain comes from your ADC sample rate. In this case > > there's "processing loss" if you will -- you're ignoring a lot of signal > > that's going by at 330MHz, while getting the full brunt of the ADC noise. > > > > But, you're sampling the output of a POWER AMPLIFIER!! If your signal is > > noisy coming out of _that_ it's not your problem! > > > > > 2.Using the same jitter/phase noise grade clock source, generating a > > > lower frequency signal will have less jitter than a higher frequency > > > signal, thus using something lower than 40MHz will have less jitter in > > > the sampling clock if using the same clock source but generating 40MHz, > > > right?(e.g. simply divide the 40MHz by 2 will reduce the jitter, right?) > > > > No. Nu-uh. Nohow. Negatory. False. Wrong. Incorrect. Not right. > > > > The phase noise of your signal coming out of the any mixing process will > > be equal to the phase noise of the component of the local oscillator at > > the signal frequency. In this case, that's the phase noise _at 330MHz_. > > That phase noise (in radians) will be the total aperture jitter of the > > ADC (clock jitter to the ADC plus whatever aperture jitter the ADC throws > > in free of charge), times 330MHz, times two times pi. So -- aperture > > jitter times about 2e9. > > > > This is sounding pretty bad (I should have done my math before!!). Why > > not just modulate the thing down to something tractable (even 5kHz) with > > a regular old local oscillator and mixer, followed by something way > > fancier than you need (for example, a single-stage RC), then use an el- > > cheapo ADC? > > > > > > > > I think the steps to go is: > > > 1. determine how much effort/$ we want to invest in the analog BPF 2. > > > the minimum Fs is thus determined > > > > > > Correct me if I'm not getting at the point! > > > > > > > > > > > > -- > > My liberal friends think I'm a conservative kook. > > My conservative friends think I'm a liberal kook. > > Why am I not happy that they have found common ground? > > > > Tim Wescott, Communications, Control, Circuits & Software > > http://www.wescottdesign.com
Reply by ●September 25, 20122012-09-25
Tim Wescott <tim@seemywebsite.com> wrote: (snip)>>> > I'm thinking about undersampling a 150Hz AM signal modulated to a >>> > 330MHz carrier, thus the signal bandwidth is 300Hz. I found an ADC >>> > has 600MHz analogue bandwidth, and minimum Fs to be 5.1kHz. Suppose >>> > the bandpass filter is sharp enough for my my signal at 330MHz, if I >>> > use 5kHz to sample the 330MHz, will there be any problem?(snip)>>> Looking at another type of jitter effects, how accurately is the 330MHz >>> carrier generated? For example, a specification of an accuracy 1 part >>> per million at 330MHz would put your sidebands typically outside of the >>> bandpass 300 Hz centered at a nominal 330MHz. That's one real world >>> issue. Another is: Are your two channels from (exactly) to same source >>> or do they have independent frequency errors?Yes, I wonder about this. If the same source is used for the carrier on both, then the situation is very different. My first thought is to put them through a mixer and get the difference between them. That only works if the carrier is the same, though. (snip)> If the only thing present on the output of those high power amps is your > signal of interest, then you don't need a bandpass filter. Bandpass > filters are necessary in receivers because you can't know what's next to > your signal in the spectrum. At the output of a power amplifier you can > nearly always figure that what's next to your signal is -- relative > silence.> This is, of course, not the case if there are multiple signals > multiplexed onto one power amplifier. Somehow I suspect this is not the > case.>> Generally two things I believe is a good news for me: 1. by using a >> sampling frequency greatly higher than needed(minimum Fs should be 600Hz >> as my AM baseband signal is 150Hz), thus by proper digital filtering and >> decimation, there's quite a few processing gain there, right?> Your processing gain comes from your ADC sample rate. In this case > there's "processing loss" if you will -- you're ignoring a lot of signal > that's going by at 330MHz, while getting the full brunt of the ADC noise.> But, you're sampling the output of a POWER AMPLIFIER!! If your signal is > noisy coming out of _that_ it's not your problem!>> 2.Using the same jitter/phase noise grade clock source, generating a >> lower frequency signal will have less jitter than a higher frequency >> signal, thus using something lower than 40MHz will have less jitter in >> the sampling clock if using the same clock source but generating 40MHz, >> right?(e.g. simply divide the 40MHz by 2 will reduce the jitter, right?)> No. Nu-uh. Nohow. Negatory. False. Wrong. Incorrect. Not right.> The phase noise of your signal coming out of the any mixing process will > be equal to the phase noise of the component of the local oscillator at > the signal frequency. In this case, that's the phase noise _at 330MHz_. > That phase noise (in radians) will be the total aperture jitter of the > ADC (clock jitter to the ADC plus whatever aperture jitter the ADC throws > in free of charge), times 330MHz, times two times pi. So -- aperture > jitter times about 2e9.But if they have the same source, then the jitter will be corelated. That might matter in some cases.> This is sounding pretty bad (I should have done my math before!!). Why > not just modulate the thing down to something tractable (even 5kHz) with > a regular old local oscillator and mixer, followed by something way > fancier than you need (for example, a single-stage RC), then use an el- > cheapo ADC?What do you use for the source of the LO? How about phase locked relative to the carrier? -- glen
Reply by ●September 25, 20122012-09-25
On Mon, 24 Sep 2012 18:27:06 -0700, nick cake wrote:> Hi Tim, > > Wow you are online and get back so quick! > > I agree that we pretty much (and should) know what should be there after > the DAC. But a BPF should be of help isn't it? > > Well I definitely need to read more about jitter and understand what you > just explained in such detail..BTW, the 2e9 is based on what unit?330MHz is approximately 2e9 radians/second. Radians/second * seconds = radians.> Anyway maybe this is why few people (if any) is using such giant > downsampling factor in real design.. For us, the thing is we want > minimum analog components in this because the phase difference of the > amp is of interest..any more analogue components might bias our > estimation..That's understandable. See others' comments about the benefits of having a correlated clock to your two channels. -- Tim Wescott Control system and signal processing consulting www.wescottdesign.com
Reply by ●September 25, 20122012-09-25
On 25.9.12 3:47 , nick cake wrote:> Hi Dale, > > Thanks for your great insights by pop out quite a few points to be clarified! I post this question initially just to confirm that there's no such sinc attenuation when it comes to undersampling as it was used in DAC tricks. Then it turns out this is theoretically correct and I became greedy to know more about implementation.. > > Hey Tauno you are deadly right, it's about ILS and compensation the phase difference between two generated channels. >For those uninitiated in ILS transmitting: There are two channels using a common carrier: - one AM modulated with equal 90 Hz and 150 Hz tones (CSB), - another with carrier-less AM DSB of the same tones, but one tone inverted (SBO). The phase of the SBO signal is rotated by 90 degrees referred to the CSB signal. There are three antennas, the middle one is fed with the CSB signal and the side antennas are fed with SBO and SBO inverted. When the signals from the three sources combine at the receiver, the relative modulation depths of the 90 and 150 Hz signals change when the receiver is on the centerline or at either side of it. The width of the ILS feather is determined by the relative strength of the SBO signal compared to the CSB signal. The direction of the centerline (where the signals are equal) is determined by the exact phase difference of the CSB and SBO signals. The antennas for the glideslope are a bit more complicated, as the lower side antenna should be below ground, but the principle is the same, anyway. I guess that the OP is attempting to avoid the unavoidable field measurement and tweaking of the ILS, but there are simply too many variables in the antenna and feed system alone. Been there, done that. -- Tauno Voipio
Reply by ●September 25, 20122012-09-25
"Tauno Voipio" <tauno.voipio@notused.fi.invalid> wrote in message news:k3spo0$ij5$1@dont-email.me...> On 25.9.12 3:47 , nick cake wrote:> For those uninitiated in ILS transmitting: There are two channels using a > common carrier: > - one AM modulated with equal 90 Hz and 150 Hz tones (CSB), > - another with carrier-less AM DSB of the same tones, > but one tone inverted (SBO).[...]> Been there, done that.Me too. Done DVOR and ILS with one ATMega MCU. No need for FPGAs and 600 MHz ADCs. Vladimir Vassilevsky DSP and Mixed Signal Consultant www.abvolt.com
Reply by ●September 25, 20122012-09-25
Great and that's my assumptions that no FPGA or very small one is more than enough for this.. Anyway, do you use filed phase tuning as Tauno suggested? ps. the 600MHz is the analogue bandwidth of the proposed ADC, not the sampling frequency. One proposed Fs is 40MHz, which I believe is way too high for this application. On Tuesday, September 25, 2012 2:03:36 PM UTC-4, Vladimir Vassilevsky wrote:> "Tauno Voipio" <tauno.voipio@notused.fi.invalid> wrote in message > > news:k3spo0$ij5$1@dont-email.me... > > > On 25.9.12 3:47 , nick cake wrote: > > > > > For those uninitiated in ILS transmitting: There are two channels using a > > > common carrier: > > > - one AM modulated with equal 90 Hz and 150 Hz tones (CSB), > > > - another with carrier-less AM DSB of the same tones, > > > but one tone inverted (SBO). > > > > [...] > > > > > Been there, done that. > > > > Me too. Done DVOR and ILS with one ATMega MCU. No need for FPGAs and 600 MHz > > ADCs. > > > > Vladimir Vassilevsky > > DSP and Mixed Signal Consultant > > www.abvolt.com
