Hi Tauno, Thanks so much for your patient and insightful explanation from your field experiences! You think the phase drift must be calibrated in the field? What about temperature variance/ againg? We are doing this to compensate by the s/w or f/w itself on the fly, isn't this a better way? On Tuesday, September 25, 2012 1:30:40 PM UTC-4, Tauno Voipio wrote:> On 25.9.12 3:47 , nick cake wrote: > > > Hi Dale, > > > > > > Thanks for your great insights by pop out quite a few points to be clarified! I post this question initially just to confirm that there's no such sinc attenuation when it comes to undersampling as it was used in DAC tricks. Then it turns out this is theoretically correct and I became greedy to know more about implementation.. > > > > > > Hey Tauno you are deadly right, it's about ILS and compensation the phase difference between two generated channels. > > > > > > > For those uninitiated in ILS transmitting: > > > > There are two channels using a common carrier: > > - one AM modulated with equal 90 Hz and 150 Hz tones (CSB), > > - another with carrier-less AM DSB of the same tones, > > but one tone inverted (SBO). > > > > The phase of the SBO signal is rotated by 90 degrees referred > > to the CSB signal. There are three antennas, the middle one > > is fed with the CSB signal and the side antennas are fed > > with SBO and SBO inverted. When the signals from the three > > sources combine at the receiver, the relative modulation > > depths of the 90 and 150 Hz signals change when the receiver > > is on the centerline or at either side of it. > > > > The width of the ILS feather is determined by the relative > > strength of the SBO signal compared to the CSB signal. The > > direction of the centerline (where the signals are equal) > > is determined by the exact phase difference of the CSB and > > SBO signals. > > > > The antennas for the glideslope are a bit more complicated, > > as the lower side antenna should be below ground, but the > > principle is the same, anyway. > > > > I guess that the OP is attempting to avoid the unavoidable > > field measurement and tweaking of the ILS, but there are > > simply too many variables in the antenna and feed system > > alone. Been there, done that. > > > > -- > > > > Tauno Voipio
Is it possible to use very large undersampling factor (using 5.1kHz to sample 330MHz)?
Started by ●September 23, 2012
Reply by ●September 25, 20122012-09-25
Reply by ●September 25, 20122012-09-25
Ok... You have a signal of interest at 330 MHz with a 300 Hz bandwidth. If you down convert by sub sampling at 5.1 kHz you will end up with the entire 600 MHz spectrum visible to your ADC folded into the resulting 2.55 kHz bandwidth. If you don't adequately band pass filter the signal at 330 MHz before you sub sample you will end up with noise and spurious signal in your 2.55 kHz bandwidth including some of it within your 300 Hz signal of interest. You can't filter out spurious signals that are on top of your signal of interest. Is there something additional you are doing that I missed? Or are you simply saying that you will shift the signal of interest to 0 Hz rather than ~2.5 kHz and then LP filter to 300 Hz (or +-150 Hz in the complex signal)? That sounds good, but you will have interference - from nearby signals and noise - right on top of your 300 Hz bandwidth if you don't adequately filter at 330 MHz. What part of that don't I get? As others have said, the hard part is the 300 Hz bandpass filter at 330 MHz. As others have also said, small deviations in the sample rate are magnified with such a high ratio of sample rate to signal frequency. Do the math. What happens if your sample rate is off by 1 ppm? Where does the signal of interest end up? Rick On 9/24/2012 8:56 PM, nick cake wrote:> Even though there is a BPF before ADC, to do decimation without the noise/not-fully-attenuated suprious/interference signal to be fold back to your new nyquist band, you need Low pass filtering! I'll down-mix my signal to DC by I/Q then why not low pass? Even I do not bring it down to DC, I can still keep all the spectrum contents from DC to my highest frequency components after being aliased to Hz level, and a low pass will still work, right? > > I think you are the only guy here not following at all.. > > > On Monday, September 24, 2012 6:01:48 PM UTC-4, rickman wrote: >> I'm not suggesting that you do it this way, I am talking about analysis. >> >> You said there is a band pass filter before the ADC, so why would you >> >> need a filter before the decimation? BTW, if you add a digital filter, >> >> it won't be a low pass. It would be a band pass since the signal is not >> >> at the low frequency until after you do the decimation and then it is >> >> too late. >> >> >> >> So do you need additional filtering or is your analog band pass adequate? >> >> >> >> I repeat my question. In terms of the resulting signal, how is the >> >> process I described different from what you have described? This should >> >> help you understand what is going on in your case and what is needed to >> >> make it work. >> >> >> >> Rick >> >> >> >> >> >> On 9/23/2012 9:51 PM, nick cake wrote: >> >>> LOL I would really like this idea if they don't care about $$$ and I actually worked with 3.6GHz sampling. But the raw dropping probably won't work cause serious LP filtering would be needed before decimation, right? >> >>> >> >>> On Sunday, September 23, 2012 7:22:28 PM UTC-4, rickman wrote: >> >>>> On 9/23/2012 5:15 PM, nick cake wrote: >> >>>> >> >>>>> Hi sampling gurus, >> >>>> >> >>>>> >> >>>> >> >>>>> I'm thinking about undersampling a 150Hz AM signal modulated to a 330MHz carrier, thus the signal bandwidth is 300Hz. I found an ADC has 600MHz analogue bandwidth, and minimum Fs to be 5.1kHz. Suppose the bandpass filter is sharp enough for my my signal at 330MHz, if I use 5kHz to sample the 330MHz, will there be any problem? >> >>>> >> >>>>> >> >>>> >> >>>>> One of my colleagues thinks there's a sinc roll-off associates with undersampling thus one cannot use very large undersampling factor. This is true for stealing higher harmonics out of a low Fs driven DAC, but I don't think this is true for ADC. >> >>>> >> >>>>> >> >>>> >> >>>>> As I understand, the ADC can be modeled as: >> >>>> >> >>>>> 1. Sampling: multiply input continuous signal with a series of Diract implues >> >>>> >> >>>>> 2. Hold： time domain convolution with a rect window, whose width is maximally Ts (and whose freq domain is a sinc, with first null at Fs) >> >>>> >> >>>>> 3. A-to-D: convert the held stable voltage to digital output using proper coding >> >>>> >> >>>>> >> >>>> >> >>>>> The aliasing effect due to undersampling happens in the 1st step, thus the 330MHz has already been "down-converted" to baseband to 601.2Hz, and my two AM bands will be at 451.2 and 751.2 respectively. Then the hold operation simply "mask" the frequency spectrum by a sinc shape and my 601.2Hz signal will be almost intact. >> >>>> >> >>>>> >> >>>> >> >>>>> Thus I won't need to do large factor decimation/filtering and save a lot of FPGA resources. >> >>>> >> >>>>> >> >>>> >> >>>>> Is this practically feasible? I asked a couple of engineers and they are not very sure.. >> >>>> >> >>>> >> >>>> >> >>>> Consider the difference between your analysis and this... >> >>>> >> >>>> >> >>>> >> >>>> Sample by flash converter at 1 GHz so that your carrier is well below >> >>>> >> >>>> the Nyquist rate. Then you drop 199,999 out of 200,000 samples to get a >> >>>> >> >>>> 5 kHz sample rate. How is this different from what you have described >> >>>> >> >>>> (assuming I did the ratio right :-)? >> >>>> >> >>>> >> >>>> >> >>>> Rick >> >>> >
Reply by ●September 25, 20122012-09-25
On Tue, 25 Sep 2012 17:16:46 -0400, rickman wrote:> Ok... > > You have a signal of interest at 330 MHz with a 300 Hz bandwidth. If > you down convert by sub sampling at 5.1 kHz you will end up with the > entire 600 MHz spectrum visible to your ADC folded into the resulting > 2.55 kHz bandwidth. If you don't adequately band pass filter the signal > at 330 MHz before you sub sample you will end up with noise and spurious > signal in your 2.55 kHz bandwidth including some of it within your 300 > Hz signal of interest. You can't filter out spurious signals that are > on top of your signal of interest. > > Is there something additional you are doing that I missed? Or are you > simply saying that you will shift the signal of interest to 0 Hz rather > than ~2.5 kHz and then LP filter to 300 Hz (or +-150 Hz in the complex > signal)? That sounds good, but you will have interference - from nearby > signals and noise - right on top of your 300 Hz bandwidth if you don't > adequately filter at 330 MHz. > > What part of that don't I get? > > As others have said, the hard part is the 300 Hz bandpass filter at 330 > MHz. As others have also said, small deviations in the sample rate are > magnified with such a high ratio of sample rate to signal frequency. Do > the math. What happens if your sample rate is off by 1 ppm? Where does > the signal of interest end up? > > RickI think you're being unduly pessimistic, particularly in light of the application. The signal being sampled is from a transmitter, so the SNR should be huge. The oscillator stability is known to be achievable, because folks build receivers at that bandwidth and carrier frequency all the time -- and besides, the sample signal can be derived from whatever generates the carrier in the first place, so even if it _is_ unstable it'll all move together. -- My liberal friends think I'm a conservative kook. My conservative friends think I'm a liberal kook. Why am I not happy that they have found common ground? Tim Wescott, Communications, Control, Circuits & Software http://www.wescottdesign.com
Reply by ●September 26, 20122012-09-26
On Sun, 23 Sep 2012 23:33:14 -0500, "Vladimir Vassilevsky" <nospam@nowhere.com> wrote:> >"nick cake" <nickcake@gmail.com> wrote in message >news:706ecb0c-56d7-421e-8b5a-efa425e794f8@googlegroups.com... >Hi sampling gurus, > >I'm thinking about undersampling a 150Hz AM signal modulated to a 330MHz >carrier, thus the signal bandwidth is 300Hz. I found an ADC has 600MHz >analogue bandwidth, and minimum Fs to be 5.1kHz. Suppose the bandpass filter >is sharp enough for my my signal at 330MHz, if I use 5kHz to sample the >330MHz, will there be any problem? > >One of my colleagues thinks there's a sinc roll-off associates with >undersampling thus one cannot use very large undersampling factor. This is >true for stealing higher harmonics out of a low Fs driven DAC, but I don't >think this is true for ADC. > >As I understand, the ADC can be modeled as: >1. Sampling: multiply input continuous signal with a series of Diract >implues >2. Hold? time domain convolution with a rect window, whose width is >maximally Ts (and whose freq domain is a sinc, with first null at Fs) >3. A-to-D: convert the held stable voltage to digital output using proper >coding > >The aliasing effect due to undersampling happens in the 1st step, thus the >330MHz has already been "down-converted" to baseband to 601.2Hz, and my two >AM bands will be at 451.2 and 751.2 respectively. Then the hold operation >simply "mask" the frequency spectrum by a sinc shape and my 601.2Hz signal >will be almost intact. > >Thus I won't need to do large factor decimation/filtering and save a lot of >FPGA resources. > >Is this practically feasible? I asked a couple of engineers and they are not >very sure.. >Wow you're back from the abyss. Or were there no Stupidents for the last six months? Mac Decman
Reply by ●September 26, 20122012-09-26
On Sep 24, 9:05�pm, nick cake <nickc...@gmail.com> wrote:> Hi Eric, > > Thanks so much for showing me such a nice illustration of those abstract theory behind sampling! I tried to google such answers before came to pose the question here.. > > Also as you suggests that as Fs goes higher, the jitter matters more, thus may I say by using a lower Fs the jitter impact on aperture uncertainty is less? > > Thanks in advance! >If you look at the Application Notes at Analog Devices, they discuss the issues associated with under sampling and in particular the phase noise requirements. I would also check the App Notes at other A/D chip manufacturers. Cheers, David
Reply by ●September 26, 20122012-09-26
if it helps: this script http://www.dsprelated.com/showcode/224.php generates phase noise according to the known spectrum of your source. and this one http://www.dsprelated.com/showcode/206.php resamples a signal at arbitrary time instants, assuming the original signal is cyclic (use zero padding if needed) and bandlimited. Phase noise in units of degrees reduces ideally 6 dB per division. But that's only because your time domain jitter remains the same while the period length doubles.
Reply by ●September 26, 20122012-09-26
"mnentwig" <24789@dsprelated> writes:> Phase noise in units of degrees reduces ideally 6 dB per division.Isn't that the same as "pink" noise? -- Randy Yates Digital Signal Labs http://www.digitalsignallabs.com
Reply by ●September 27, 20122012-09-27
Hi, a typical phase noise spectrum may indeed appear in "different shades of pink" , for example between 50k and 50M in a cellphone synthesizer, to give some order-of-magnitude numbers. But I meant something different: Assume I start with a high-frequency signal, say, 4 GHz. There is a given time jitter on each edge, say 10 ps, in a 250 ps cycle duration. Now I divide the signal by 4. I've still got 10 ps jitter, but the cycle duration is now four times as long, 1000 ps. Now I convert 10 ps to an angle, relative to the cycle durations 250 ps and 1000 ps. At 4 GHz, it's equivalent to 14.4 degrees, but at 1 GHz only 3.6 degrees. Effectively, the phase noise (in units of degrees!) is cut in half (-6 dB ) with every division-by-2. If the phase _angle_ matters, such as when multiplying with a local oscillator, this really improves performance. But it doesn't help if the accuracy of a sampling process is in question (where the error manifests itself in units of seconds, not degrees). The problem here is that the sampled signal moves too quickly, relative to the accuracy of the sampling clock. Sampling clock and signal are like Indians and cowboys in an old western movie: Either I run my horse alongside the other guy at about the same speed. Or, I need to shoot very accurately :o) -markus
Reply by ●September 27, 20122012-09-27
Hi Markus, That's a very vivid analogy and I begin to understand why jitter of Fs, which for me can be very low compares to the Fc(330MHz), matters to my phase measurement accuracy. But again, after undersampling, if the aliased carrier signal is at 1kHz for example, my phase accuracy needs to be 1 degree RMS for example, then the jitter RMS in my Fs needs to be 0.001/360 second, am I right? On Thursday, September 27, 2012 3:31:33 AM UTC-4, mnentwig wrote:> Hi, > > > > a typical phase noise spectrum may indeed appear in "different shades of > > pink" , for example between 50k and 50M in a cellphone synthesizer, to give > > some order-of-magnitude numbers. > > > > But I meant something different: > > > > Assume I start with a high-frequency signal, say, 4 GHz. There is a given > > time jitter on each edge, say 10 ps, in a 250 ps cycle duration. > > > > Now I divide the signal by 4. I've still got 10 ps jitter, but the cycle > > duration is now four times as long, 1000 ps. > > > > Now I convert 10 ps to an angle, relative to the cycle durations 250 ps and > > 1000 ps. > > At 4 GHz, it's equivalent to 14.4 degrees, but at 1 GHz only 3.6 degrees. > > Effectively, the phase noise (in units of degrees!) is cut in half (-6 dB ) > > with every division-by-2. > > > > If the phase _angle_ matters, such as when multiplying with a local > > oscillator, this really improves performance. > > But it doesn't help if the accuracy of a sampling process is in question > > (where the error manifests itself in units of seconds, not degrees). The > > problem here is that the sampled signal moves too quickly, relative to the > > accuracy of the sampling clock. > > > > Sampling clock and signal are like Indians and cowboys in an old western > > movie: Either I run my horse alongside the other guy at about the same > > speed. Or, I need to shoot very accurately :o) > > > > -markus
Reply by ●September 27, 20122012-09-27
Also what if everything is from the same source, i.e. the 330MHz and my ADC sampling clock are all generated from the same osc? Will this make a difference that I don't need to worry the jitter in my Fs? The jitter spec is only derived from the jitter/phase noise requirement on the generated 330MHz? On Thursday, September 27, 2012 3:31:33 AM UTC-4, mnentwig wrote:> Hi, > > > > a typical phase noise spectrum may indeed appear in "different shades of > > pink" , for example between 50k and 50M in a cellphone synthesizer, to give > > some order-of-magnitude numbers. > > > > But I meant something different: > > > > Assume I start with a high-frequency signal, say, 4 GHz. There is a given > > time jitter on each edge, say 10 ps, in a 250 ps cycle duration. > > > > Now I divide the signal by 4. I've still got 10 ps jitter, but the cycle > > duration is now four times as long, 1000 ps. > > > > Now I convert 10 ps to an angle, relative to the cycle durations 250 ps and > > 1000 ps. > > At 4 GHz, it's equivalent to 14.4 degrees, but at 1 GHz only 3.6 degrees. > > Effectively, the phase noise (in units of degrees!) is cut in half (-6 dB ) > > with every division-by-2. > > > > If the phase _angle_ matters, such as when multiplying with a local > > oscillator, this really improves performance. > > But it doesn't help if the accuracy of a sampling process is in question > > (where the error manifests itself in units of seconds, not degrees). The > > problem here is that the sampled signal moves too quickly, relative to the > > accuracy of the sampling clock. > > > > Sampling clock and signal are like Indians and cowboys in an old western > > movie: Either I run my horse alongside the other guy at about the same > > speed. Or, I need to shoot very accurately :o) > > > > -markus
