Improving DAC Performance with Delta Sigma

Hi Guys,

Could we linearize a multi-bit DAC converter that may have nonlinearity
in the lower bits by quantizing to a coarser resolution and utilizing a
delta sigma modulator to improve the SNR?

For example, let's say our DAC is 18 bits but only has 16 "good" bits.
If we design a delta sigma modulator with a 16 bit input, an
oversampling ratio of four, and a modulator order of two, we could get
effectively 20 bits out.

Or do DAC nonlinearities not operate this way?
-- 
Randy Yates
Digital Signal Labs
http://www.digitalsignallabs.com

Randy Yates <yates@digitalsignallabs.com> writes:

> Hi Guys,
>
> Could we linearize a multi-bit DAC converter that may have nonlinearity
> in the lower bits by quantizing to a coarser resolution and utilizing a
> delta sigma modulator to improve the SNR?
>
> For example, let's say our DAC is 18 bits but only has 16 "good" bits.
> If we design a delta sigma modulator with a 16 bit input, an
> oversampling ratio of four, and a modulator order of two, we could get
> effectively 20 bits out.

Correction: design the delta sigma modulator with a 20-bit input and a
16-bit output.
-- 
Randy Yates
Digital Signal Labs
http://www.digitalsignallabs.com

On Tue, 15 Jan 2013 15:22:23 -0500, Randy Yates wrote:

> Hi Guys,
> 
> Could we linearize a multi-bit DAC converter that may have nonlinearity
> in the lower bits by quantizing to a coarser resolution and utilizing a
> delta sigma modulator to improve the SNR?
> 
> For example, let's say our DAC is 18 bits but only has 16 "good" bits.
> If we design a delta sigma modulator with a 16 bit input, an
> oversampling ratio of four, and a modulator order of two, we could get
> effectively 20 bits out.
> 
> Or do DAC nonlinearities not operate this way?

Some do, some don't.

I think your best bet for understanding this would be to go look at some 
DAC data sheets, or maybe find an app note that discusses the difference 
between "differential nonlinearity" and "integral nonlinearity".

Basically, you're not going to fix the integral nonlinearity to any 
significant degree, although you can probably improve the differential 
nonlinearity.

While you're thinking about all of this, there may be another approach 
that might work better than a sigma-delta DAC with a reduced number of 
bits.  Reducing the number of bits introduces quantization noise, which 
you're hoping will reduce nonlinearity problems.  If, instead of 
introducing quantization noise you generate some pseudo-random noise, 
then sigma-delta around that, you would have the same "smearing" effect 
on the differential nonlinearity, but you'd be using more of the 
available DAC output voltages.

I have absolutely no clue if it'd be better -- one would have to do some 
think'n' and experiment'n' to figure it out.

-- 
My liberal friends think I'm a conservative kook.
My conservative friends think I'm a liberal kook.
Why am I not happy that they have found common ground?

Tim Wescott, Communications, Control, Circuits & Software
http://www.wescottdesign.com

Tim Wescott <tim@seemywebsite.com> wrote:
> On Tue, 15 Jan 2013 15:22:23 -0500, Randy Yates wrote:

(snip)
>> Could we linearize a multi-bit DAC converter that may have nonlinearity
>> in the lower bits by quantizing to a coarser resolution and utilizing a
>> delta sigma modulator to improve the SNR?

(snip)
>> Or do DAC nonlinearities not operate this way?
 
> Some do, some don't.
 
> I think your best bet for understanding this would be to go look at some 
> DAC data sheets, or maybe find an app note that discusses the difference 
> between "differential nonlinearity" and "integral nonlinearity".

Sounds like what physics calls random error vs. systematic error.

The former you can average out, the latter you can't.
 
> Basically, you're not going to fix the integral nonlinearity to any 
> significant degree, although you can probably improve the differential 
> nonlinearity.

I don't quite understand your names, but if the non-linearities are
constant, then they won't average out. A flash ADC, with an array or
resistors and comparitors, will have some non-linearity due to the 
variations in the resistors.

As I understand it, the sensors in digital cameras have some variation
in the sensitivity of individual pixels. There is a look-up table that
is used to correct for such non-linearity. 

Seems to me that you could also use a LUT on an ADC, if you could
measure the non-linearity well enough. 
 
> While you're thinking about all of this, there may be another approach 
> that might work better than a sigma-delta DAC with a reduced number of 
> bits.  Reducing the number of bits introduces quantization noise, which 
> you're hoping will reduce nonlinearity problems.  If, instead of 
> introducing quantization noise you generate some pseudo-random noise, 
> then sigma-delta around that, you would have the same "smearing" effect 
> on the differential nonlinearity, but you'd be using more of the 
> available DAC output voltages.

I remember a system from many years ago, designed to be faster than
the then-current technology. It used a four bit ADC, four bit DAC,
and then another four bit ADC. The signal went to the first ADC,
the output went to the DAC, and then went to an analog subtractor
to generate the input for the final ADC. While the first ADC was
only four bits, it had to be accurate to 8 bits.  I believe all
flash ADC, as that is as fast as possible.
 
> I have absolutely no clue if it'd be better -- one would have to 
> do some think'n' and experiment'n' to figure it out.

-- glen

"glen herrmannsfeldt" <gah@ugcs.caltech.edu> wrote:

> I remember a system from many years ago, designed to be faster than
> the then-current technology. It used a four bit ADC, four bit DAC,
> and then another four bit ADC. The signal went to the first ADC,
> the output went to the DAC, and then went to an analog subtractor
> to generate the input for the final ADC.

This is what is called "pipelined ADC". It is a common approach for high 
sampling rates and high resolution. Nonlinearity errors are usually 
corrected by LUT somewhere in the process.

VLV

On Tue, 15 Jan 2013 23:10:15 +0000, glen herrmannsfeldt wrote:

> Tim Wescott <tim@seemywebsite.com> wrote:
>> On Tue, 15 Jan 2013 15:22:23 -0500, Randy Yates wrote:
> 
> (snip)
>>> Could we linearize a multi-bit DAC converter that may have
>>> nonlinearity in the lower bits by quantizing to a coarser resolution
>>> and utilizing a delta sigma modulator to improve the SNR?
> 
> (snip)
>>> Or do DAC nonlinearities not operate this way?
>  
>> Some do, some don't.
>  
>> I think your best bet for understanding this would be to go look at
>> some DAC data sheets, or maybe find an app note that discusses the
>> difference between "differential nonlinearity" and "integral
>> nonlinearity".
> 
> Sounds like what physics calls random error vs. systematic error.
> 
> The former you can average out, the latter you can't.

(balance snipped)

It isn't really systematic vs. random.  Both are deterministic 
("systematic").  But DACs often integral error that's only a bit higher 
than the differential error, instead of sqrt(2^bits) or something scary 
like that.  So the percentage error going from one bit to the next may be 
50% (1/2 LSB is a common measure for differential error), but if the DAC 
maker has held the integral nonlinearity error down, then that error will 
not propagate to the next LSB and the next.  Hence, scrambling and 
averaging may help.

Like I said, it'll take some experimentation and deep study of the data 
sheets.

-- 
My liberal friends think I'm a conservative kook.
My conservative friends think I'm a liberal kook.
Why am I not happy that they have found common ground?

Tim Wescott, Communications, Control, Circuits & Software
http://www.wescottdesign.com

Tim Wescott <tim@seemywebsite.com> wrote:

(snip, I wrote)
>> Sounds like what physics calls random error vs. systematic error.
 
>> The former you can average out, the latter you can't.
 
> (balance snipped)
 
> It isn't really systematic vs. random.  Both are deterministic 
> ("systematic").  But DACs often integral error that's only a bit higher 
> than the differential error, instead of sqrt(2^bits) or something scary 
> like that.  So the percentage error going from one bit to the next may be 
> 50% (1/2 LSB is a common measure for differential error), but if the DAC 
> maker has held the integral nonlinearity error down, then that error will 
> not propagate to the next LSB and the next.  Hence, scrambling and 
> averaging may help.

OK, I think I see that. I was thinking in terms of the flash ADC, 
where it is easier to see the effect of non-linearity. For other ones,
yes, it is more complicated.
 
> Like I said, it'll take some experimentation and deep study of the data 
> sheets.

-- glen

The shaped noise will fold down in the presence of non linearity. You can make an ideal 16 bit dac into a 20 bit dac this way, but you can't make a crappy 16 bit dac into a good 20 bit dac, unless the dac errors are gentle curves with no low-level dnl errors

Bob

Robert Adams <robert.adams@analog.com> writes:

> The shaped noise will fold down in the presence of non linearity. You
> can make an ideal 16 bit dac into a 20 bit dac this way, but you can't
> make a crappy 16 bit dac into a good 20 bit dac, unless the dac errors
> are gentle curves with no low-level dnl errors

Yeah, but can you use 14 good bits of a crappy 16 bit dac into a 20 bit
dac???
-- 
Randy Yates
Digital Signal Labs
http://www.digitalsignallabs.com

Only if those 14 bits are accurate to the 20-bit level