C6000 assembler optimizer is optimizing too much

Hello,

Mark Fiedler schrieb:

> There is no need for the volatile qualifier in assembler.  "volatile"
> is strictly a compiler directive to make sure that the compiler
> generates assembly code for the C source lines in question rather than
> optimizing them away.  Assemblers are more or less WYSIWYG, i.e., they
> don't optimize code.

Thats not true anymore - the C6000 can execute up to eight instructions in parallel.
It is possible to program in parallel assembler, but if speed is not highest important, this is rather
difficult.

I am using the "serial assembler" - "normal" assembler code, without parallelism and without the need
to take care of instructions, which will execute delayed.

The assembler optimizer then optimizes and parallelizes the serial assembler code.

Greetz,
Martin

Hello,

Andrew Nesterov schrieb:

> What if reserve space for a global variable (somewhere in .data or .bss
> or whatever else, but declare it global) and store it with the context
> you have just loaded, perhaps this way you would "deceive" the optimizer,
> show it that the loaded value IS used, although such a solution is certainly
> waste of resources.

But in this case I have to load an extra register to hold the address of the
dummy variable. Because of purism ideals, I don't like the idea :o)

Up till now, I have another solution - after the .(c)proc statement, I reserve a
register, e.g. ".reserve A31".
And then I use direct this reserved register, e.g. "LDW *ADDR,A31".

This is working - I really don't like to reserve one register and disturb the
automatic assertion of registers by the optimizer - but its working....

> For other posts: I am not sure that even declaring the location to be
> read off as volatile in C code would solve the problem, as this
> read is soft of "futile", since the value will not be used afterward,
> and the optimizer should be wiping off such reads anyway. Might be
> the same trick with storing a "garbage" global location would help.

I also think, that the "volatile" statement only mean, that this address must be
read every time. If the read value is thrown away, the read instruction would be
optimized away though.

I think it is a bit strange, that TI don't provide a solution to this problem.
Even in the C6000-DSP itself, there are registers, which have to only read to
get the desired effect (I think it is something with the L2-Cache clearing).
Therefore I am not sure what they suppose, one should do - program allways in
direct parallel assembler?

> One more .sa problem: it might be so that I need to write a squence
> of memory locations in a certain order, e.g. to start a QDMA transfer.
> I do know how to ensure a sertain order in C (use commas and a semicolon
> in the end, forgotten the term, whatewer "point"), but it seem to be
> no ways to enforce this in a serial assembly code?

Hm, I really had no problems in this direction. All my initialisation of
registers (on chip, or also peripheral registers) was also after the optimizer
in the right order.
One other question - is it possible to know, when the QDMA transfer is ready by
polling a register? I don't want to use the interrupt for an one-time memory
copy.

Greetz,
Martin