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ADSP-21xx SPORT

Started by Vladimir Vassilevsky September 2, 2003
Hello All,

 According to the datasheet, the SPORT of ADSP-21xx is double buffered.
There is a need to transmit just two serial words in one burst. Is it
possible to write two words one immediately after other to TX register?

 Vladimir Vassilevsky

DSP and Mixed Signal Design Consultant

http://www.abvolt.com
Vladimir Vassilevsky <vlv@abvolt.com> wrote in message news:<3F5492F0.DA5697B0@abvolt.com>...
> Hello All, > > According to the datasheet, the SPORT of ADSP-21xx is double buffered. > There is a need to transmit just two serial words in one burst. Is it > possible to write two words one immediately after other to TX register? >
Sure, why not?
> Vladimir Vassilevsky > > DSP and Mixed Signal Design Consultant > > http://www.abvolt.com
Vladimir Vassilevsky <vlv@abvolt.com> wrote in message news:<3F5492F0.DA5697B0@abvolt.com>...
> Hello All, > > According to the datasheet, the SPORT of ADSP-21xx is double buffered. > There is a need to transmit just two serial words in one burst. Is it > possible to write two words one immediately after other to TX register? > > Vladimir Vassilevsky > > DSP and Mixed Signal Design Consultant > > http://www.abvolt.com
Yes, you can also use auto buffering - kind of DMA - and write pretty much as many words as you want. See the online tutorial on my web site, there may be some example code of use to you. Cheers, Herman http://www.AerospaceSoftware.com
Vladimir Vassilevsky <vlv@abvolt.com> wrote in message news:<3F5492F0.DA5697B0@abvolt.com>...
> Hello All, > > According to the datasheet, the SPORT of ADSP-21xx is double buffered. > There is a need to transmit just two serial words in one burst. Is it > possible to write two words one immediately after other to TX register? > > Vladimir Vassilevsky > > DSP and Mixed Signal Design Consultant > > http://www.abvolt.com
If you have a user's manual (can be obtained from www.analog.com), refer to figure 5.1. The double buffer consists of the data transmit register (DTR), and the transmit shift register (TSR). Data to send is held in the DTR until the TSR is empty, then it is automatically transferred from the DTR to the TSR. This can take some time, as the serial clock and the processor clock can be asynchronous, and the two buffers run from the two different clocks so relying the DTR to empty always before you write a second word is dangerous, even if you know the TSR is initially empty. The interrupt indicating the DTR can be written to is not set by the uP until the first eight bits of the TSR have been sent to allow for this latency (I think). If you don't want to use interrupts, you can poll the interrupt pending bits instead. If you have a predictable clocking situation you may be able to get away with putting in enough No-ops after the first write to make sure the DTR has emptied. You may also wish to consider autobuffering, which works very well and isn't too complicated. It allows you to buffer as much data as you wish, and is very processor-efficient. I think this is accurate info. I haven't worked with these chips in the past year, but did a lot with the SPORTs before then. Regards, Glenn Dixon
Vladimir Vassilevsky <vlv@abvolt.com> wrote in message news:<3F5492F0.DA5697B0@abvolt.com>...
> Hello All, > > According to the datasheet, the SPORT of ADSP-21xx is double buffered. > There is a need to transmit just two serial words in one burst. Is it > possible to write two words one immediately after other to TX register? > > Vladimir Vassilevsky > > DSP and Mixed Signal Design Consultant > > http://www.abvolt.com
No. You can't write to Transmit Shift Register (TSR), only to the Transmit Data Register (TDR). When TSR becames empty, it loads it's data from TDR, and, if programmed to, generates an interrupt. Then you have the time of tramsmission of an entirely word to reload the TDR. Why don't you use the Autobuffering? The DSP automatically loads TDR from a buffer, and generates an interrupt when the buffer is empty. Luiz Carlos

Glenn Dixon wrote:
> > > According to the datasheet, the SPORT of ADSP-21xx is double buffered. > > There is a need to transmit just two serial words in one burst. Is it > > possible to write two words one immediately after other to TX register? > > > If you have a user's manual (can be obtained from www.analog.com), > refer to figure 5.1.
Sure I have read the user manual and the datasheets.
> The double buffer consists of the data transmit > register (DTR), and the transmit shift register (TSR). Data to send > is held in the DTR until the TSR is empty, then it is automatically > transferred from the DTR to the TSR. This can take some time, as the > serial clock and the processor clock can be asynchronous, and the two > buffers run from the two different clocks so relying the DTR to empty > always before you write a second word is dangerous, even if you know > the TSR is initially empty.
The manual says nothing about the latency of the actual DTR to TSR transfer. The only thing they mention is that the transmit interrupt is generated when the first bit is output from SPORT. That implies latency of 2 SCK sycles (one for first bit and another one for TFS).
> If you don't want to use interrupts, you can > poll the interrupt pending bits instead. > If you have a predictable > clocking situation you may be able to get away with putting in enough > No-ops after the first write to make sure the DTR has emptied.
TX interrupt does not guarantee that two words would be sent as one burst because anything may block the interrupt. Wasting two SCK cycles polling for interrupt bit or just doing nops may be an option, however I wonder if it is possible to do just two consecutive writes to TX register.
> You may also wish to consider autobuffering, which works very well and > isn't too complicated. It allows you to buffer as much data as you > wish, and is very processor-efficient.
Autobuffer is good when you have to transmit a lot of data. Wasting a pointer to transmit two words is not a good solution.
> I think this is accurate info. I haven't worked with these chips in > the past year, but did a lot with the SPORTs before then. > > Regards, > Glenn Dixon
Vladimir Vassilevsky
Vladimir Vassilevsky <vlv@abvolt.com> wrote in message news:<3F54EDD3.C6D10A40@abvolt.com>...
> Glenn Dixon wrote: > >
> > If you have a user's manual (can be obtained from www.analog.com), > > refer to figure 5.1. > > Sure I have read the user manual and the datasheets.
I did not ask you to read the datasheet, but to refer to the figure so we would both be looking at the same thing. You implied you had read a datasheet.
> > The manual says nothing about the latency of the actual DTR to TSR > transfer. The only thing they mention is that the transmit interrupt is > generated when the first bit is output from SPORT. That implies latency > of 2 SCK sycles (one for first bit and another one for TFS).
This seems reasonable, but could be longer due to clock deglitch circuitry. On the 2181, the min SCK period is 50 nS, and you can run the DSP at 25 nS internal clock, so the short answer in this case is no, you cannot write in two consecutive clocks. Your situation may be different. Sorry I couldn't be more helpful. Glenn Dixon