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SRF-PLL problem

Started by Mimar March 27, 2013
Hello,

can somebody give me an advice? I have decided to use SRF-PLL system for
frequency tracking/estimation in 3 phase power grid recently but there is
some problems:
1. long settling time, but I beliave, I will solve this soon
2. if I am trying to change frequency constantly(= frequency ramp), the
estimation frequency curve is above reference curve and the distanc of
these curves gets bigger with time. So I can say, resulting frequency does
not follow grid frequency by frequency ramp.

In other situation it works quite well.
I have been testing a lot of PLL systems in Matlab for long time, but
problem with frequency ramp continues.

Thank you for your ideas.

PS: I am sorry, my English is not good.
On 3/27/2013 9:53 AM, Mimar wrote:
> > can somebody give me an advice?
Get a clue.
> I have decided to use SRF-PLL system for > frequency tracking/estimation in 3 phase power grid recently but there is > some problems:
What is SRF-PLL ?
> 1. long settling time, but I beliave, I will solve this soon
If you are going to solve it soon, then why asking. VLV
On Wed, 27 Mar 2013 09:53:41 -0500, Mimar wrote:

> Hello, > > can somebody give me an advice? I have decided to use SRF-PLL system for > frequency tracking/estimation in 3 phase power grid recently but there > is some problems: > 1. long settling time, but I beliave, I will solve this soon 2. if I am > trying to change frequency constantly(= frequency ramp), the estimation > frequency curve is above reference curve and the distanc of these curves > gets bigger with time. So I can say, resulting frequency does not follow > grid frequency by frequency ramp. > > In other situation it works quite well. I have been testing a lot of PLL > systems in Matlab for long time, but problem with frequency ramp > continues. > > Thank you for your ideas. > > PS: I am sorry, my English is not good.
First, I question whether a PLL is really the best approach for this sort of thing. Given that this is a DSP group, I'm assuming that you're doing this digitally. Assuming that you have the processing power available, there are better ways to estimate frequency than by implementing a traditional PLL. Ultimately, a phase locked loop is an excellent solution to the problem when your signal processing capabilities are largely limited to analog circuits. When you can do DSP, there are better ways. I would consider an approach that samples your signal over some fixed interval, then does a best-fit of a sine wave to that signal. The frequency of the sine wave that fits best is then your frequency estimate. Second, if you still feel that you absolutely, positively, must stick with a PLL, please share some details. If you are implementing the PLL correctly and in the canonical way, then your problem with ramping is in your loop filter. But over the years I've seen PLL circuits and algorithms messed up in some pretty astounding ways, and even seen a few very non-canonical arrangements that worked quite well indeed. So I can't just issue general directives without seeing what you're doing. PLEASE DON'T BOTHER WITH POSTING JUST CODE!! Post a block diagram, or at least a three- or four-line algorithmic description. If you must, post the code with it, but post a block diagram. If all you have is code, and you can't draw up a block diagram or extract the essentials of the algorithm from it, then chances are that you don't really know what it is that you are doing. In that event, as you build your block diagram you may find your problem without having to ask us further. -- My liberal friends think I'm a conservative kook. My conservative friends think I'm a liberal kook. Why am I not happy that they have found common ground? Tim Wescott, Communications, Control, Circuits & Software http://www.wescottdesign.com
On Mar 27, 10:53&#4294967295;am, "Mimar" <94571@dsprelated> wrote:
> Hello, > > can somebody give me an advice? I have decided to use SRF-PLL system for > frequency tracking/estimation in 3 phase power grid recently but there is > some problems: > 1. long settling time, but I beliave, I will solve this soon > 2. if I am trying to change frequency constantly(= frequency ramp), the > estimation frequency curve is above reference curve and the distanc of > these curves gets bigger with time. So I can say, resulting frequency does > not follow grid frequency by frequency ramp. > > In other situation it works quite well. > I have been testing a lot of PLL systems in Matlab for long time, but > problem with frequency ramp continues. > > Thank you for your ideas. > > PS: I am sorry, my English is not good.
Why would anyone need a PLL for frequency estimation/tracking (other than for some useless homework assignment) ? PLLs were invented long time ago for analog circuitry and migrated into digital domain With digitized signals, however, all you need is this very simple function: Hist(k) = Sum ( H( r - |s(i) - s(i+k)|) ), where H is a step function, r can be a constant value, summation is done over some time window, and you are measuring cycle period length, not a frequency per se Dividing one by period gives you frequency Tracks fundamental frequency like a charm - the response time is well under 2 cycles (You do need to design some logic around the formula to dynamically control your window size but I'm not gonna tell you how) Give it a try...
On 3/27/2013 1:02 PM, angrydude wrote:
> On Mar 27, 10:53 am, "Mimar" <94571@dsprelated> wrote: >> Hello, >> >> can somebody give me an advice? I have decided to use SRF-PLL system for >> frequency tracking/estimation in 3 phase power grid
> With digitized signals, however, all you need is this very simple > function: > > Hist(k) = Sum ( H( r - |s(i) - s(i+k)|) ), > > where H is a step function, r can be a constant value, summation is > done over some time window, and you are measuring cycle period length, > not a frequency per se > > Dividing one by period gives you frequency > > Tracks fundamental frequency like a charm - the response time is well > under 2 cycles
Dear Dmirty Teres, Matlabi got 3 phases. He can get frequency like a charm: the response time is just 2 samples.
> (You do need to design some logic around the formula to dynamically > control your window size but I'm not gonna tell you how)
I am sorry but this doesn't look like a good application for patented ultimate Teres algorithm. VLV
On Mar 27, 2:28&#4294967295;pm, Vladimir Vassilevsky <nos...@nowhere.com> wrote:
> On 3/27/2013 1:02 PM, angrydude wrote: > > > > > > > On Mar 27, 10:53 am, "Mimar" <94571@dsprelated> wrote: > >> Hello, > > >> can somebody give me an advice? I have decided to use SRF-PLL system for > >> frequency tracking/estimation in 3 phase power grid > > With digitized signals, however, all you need is this very simple > > function: > > > Hist(k) = Sum ( H( r - |s(i) - s(i+k)|) ), > > > where H is a step function, r can be a constant value, summation is > > done over some time window, and you are measuring cycle period length, > > not a frequency per se > > > Dividing one by period gives you frequency > > > Tracks fundamental frequency like a charm - the response time is well > > under 2 cycles > > Dear Dmirty Teres, > > Matlabi got 3 phases. He can get frequency like a charm: the response > time is just 2 samples. > > > (You do need to design some logic around the formula to dynamically > > control your window size but I'm not gonna tell you how) > > I am sorry but this doesn't look like a good application for patented > ultimate Teres algorithm. > > VLV- Hide quoted text - > > - Show quoted text -
I said "give it a try" frequency is frequency and OP didn't post any signal examples or his performance requirements But if he does then I can tell you if this is a good application or not, regardless of your mumbling here
Tim Wescott <tim@seemywebsite.com> wrote:
> On Wed, 27 Mar 2013 09:53:41 -0500, Mimar wrote:
(snip)
>> can somebody give me an advice? I have decided to use SRF-PLL system for >> frequency tracking/estimation in 3 phase power grid recently but there >> is some problems:
(snip)
> First, I question whether a PLL is really the best approach for this sort > of thing. Given that this is a DSP group, I'm assuming that you're doing > this digitally. Assuming that you have the processing power available, > there are better ways to estimate frequency than by implementing a > traditional PLL.
I have a few times recommended a PLL based frequency multiplier for sampling of power line signals, such that whole cycles can be processed, and avoiding the need for windowing. But that works when you don't really need to know the frequency. (Computer RMS voltage, current, power factor, etc.)
> Ultimately, a phase locked loop is an excellent solution to the problem > when your signal processing capabilities are largely limited to analog > circuits. When you can do DSP, there are better ways.
This also reminds me many years ago of a design for a car tachometer with a PLL based frequency multiplier. With a V8 engine, you have four pulses on the ignition coil per revolution. (Yes, that long ago.) So, 15 seconds to count enough for an RPM indication. Longer for a V6 or 4 cylinder engine. With a PLL based multiplier, you can update the display, in RPM (not tens of RPM) every second or so.
> I would consider an approach that samples your signal over some fixed > interval, then does a best-fit of a sine wave to that signal. > The frequency of the sine wave that fits best is then your > frequency estimate.
Maybe I completely miss the problem at hand. Are we talking about the regular 60Hz power grid? The one that normally should be fairly close to 60Hz. (Or 50Hz in some parts of the world.) I presume, than, that one wants to measure very small deviations from the nominal frequency. To do that, one will need a reference somewhat better than the signal being measured. Seems to me that, similar to the tachometer problem, one has the a signal where a frequency counter, or sine fit, has to integrate over a fairly long time period, but one might want to measure the change over shorter periods. Say, for example, one wants to calculate deviations from 60.00000Hz updating every second. I suppose I am still thinking about an analog PLL. -- glen
angrydude <simfidude@gmail.com> wrote:

(snip)

> Why would anyone need a PLL for frequency estimation/tracking (other > than for some useless homework assignment) ?
> PLLs were invented long time ago for analog circuitry and migrated > into digital domain
> With digitized signals, however, all you need is this very simple > function:
> Hist(k) = Sum ( H( r - |s(i) - s(i+k)|) ),
> where H is a step function, r can be a constant value, summation is > done over some time window, and you are measuring cycle period length, > not a frequency per se
> Dividing one by period gives you frequency
> Tracks fundamental frequency like a charm - the response time is well > under 2 cycles
OK, say you want to measure frequency to 1 part per million resolution. You have to time the period to one millionth of a period. If the frequency is 60Hz, the period is about 16ms, and one millionth is 60ns. As was noted in the discussion about piano tuning, you have to watch out for noise and/or harmonics, which will generate other transitions that look like zero crossing (for example, if you time between zero crossings). So, you have to filter through a narrow band filter to keep all the noise out, such as is common on power lines. (I still assume we are talking about AC power lines, but noise is there for other systems, too.) -- glen
On Mar 27, 3:50&#4294967295;pm, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote:
> angrydude <simfid...@gmail.com> wrote: > > (snip) > > > Why would anyone need a PLL for frequency estimation/tracking (other > > than for some useless homework assignment) ? > > PLLs were invented long time ago for analog circuitry and migrated > > into digital domain > > With digitized signals, however, all you need is this very simple > > function: > > Hist(k) = Sum ( H( r - |s(i) - s(i+k)|) ), > > where H is a step function, r can be a constant value, summation is > > done over some time window, and you are measuring cycle period length, > > not a frequency per se > > Dividing one by period gives you frequency > > Tracks fundamental frequency like a charm - the response time is well > > under 2 cycles > > OK, say you want to measure frequency to 1 part per million resolution. > You have to time the period to one millionth of a period. If the > frequency is 60Hz, the period is about 16ms, and one millionth is 60ns. > > As was noted in the discussion about piano tuning, you have to watch out > for noise and/or harmonics, which will generate other transitions that > look like zero crossing (for example, if you time between zero > crossings). > > So, you have to filter through a narrow band filter to keep all the > noise out, such as is common on power lines. (I still assume we are > talking about AC power lines, but noise is there for other systems, > too.) > > -- glen
Don't know anything about OP's specific goals - just stated that PLL might not be what he wants But for piano tuning or voice F0 tracking the question is settled for me (and a lot of other folks) Harmonics are no problem at all Noise is noise though, so expect no miracles there: any method will be affected. May need to increase window size but then you lose time resolution
>But for piano tuning or voice F0 tracking the question is settled for >me (and a lot of other folks)
http://miracle.otago.ac.nz/tartini/index.html This cat Phillip McLeod came up with an interesting technique for pitch extraction. He develped an application called Tartini to demonstrate it and wrote some interesting documentation explaining how it works. I got a kick out of it anyway.