>Hi, > >the keyword here is "oversampling". >For a narrow-band signal, the same ADC gives a higher SNR than for a >wide-band signal, as you can filter away the quantization noise thatfalls>out-of-band > >An intuitive explanation is that the information is not only in the >quantized values, but also in the time, where the quantized signalchanges.> > >_____________________________ >Posted through www.DSPRelated.com >I'll consider this affect in my implementation. Thanks Regards, Brad _____________________________ Posted through www.DSPRelated.com
Effect of Input ADC Bandwidth
Started by ●September 18, 2013
Reply by ●September 19, 20132013-09-19
Reply by ●September 19, 20132013-09-19
>> then what could be the power/strength of interfering signal that istolerable Example 1: the interfering signal has the same power as the wanted signal, the peaks will add constructively, giving twice the voltage. To avoid clipping, you have to back off gain by about 6 dB => 6 dB lower SNR. Example 2: The interfering signal has 100 x the power of your wanted signal, you lose (approximately) 20 dB. _____________________________ Posted through www.DSPRelated.com
Reply by ●September 19, 20132013-09-19
On Thursday, September 19, 2013 7:52:00 AM UTC-4, Randy Yates wrote:> radams2000@gmail.com writes: > If you have large interfering signal components above your 2mhz signal > range then it's best to remove them in the analog domain, otherwise > any ADC nonlinearity could produce in-band spurs that cannot be > removed by subsequent digital filtering. But if the out-of-band energy > is just low-level noise then it probably won't make much difference > either way. Bob, You bring up (indirectly) a point I failed to address in my response yesterday. Even if the ADC had no such nonlinearities, you still have the problem that, since the ADC's peak input is limited, such a signal would require the signal-of-interest to be greatly attenuated, which in effect throws away a good bit of your ADC resolution. If you add the possible (and practical) nonlinearity problem in, then between the two it can be a serious issue. -- Randy Yates Digital Signal Labs http://www.digitalsignallabs.comRandy I agree, both can be serious issues. Another point of consideration is that the sensitivity of an ADC to clock jitter is proportional to the product of frequency X Amplitude, so removing high-frequency components in the analog domain gives you are greater tolerance to clock jitter.
Reply by ●September 21, 20132013-09-21
On Wed, 18 Sep 2013 07:32:09 -0400, Randy Yates [Snipped by Lyons]> >PS: Brad, I should have stated the most general truth about filtering >first: using a narrower filter is (almost?) always better than a wider >filter, as long as the filter is wide enough to pass your >signal-of-interest, since it filters out noise. This is true in both the >analog and digital domains. However, you have the other concerns I >discussed when you consider both domains. > >--RandyHi Randy, Thanks for this particular post of yours. You make an important point. *ALL* of the analog signal's noise, at the output of the analog filter, will show up in the digital signal's spectrum. So the lower the bandwidth of the analog filter, the lower will be the noise in the digital signal. Of course, the total noise in the digital signal will be the sum of the analog noise in the analog signal plus the quantization noise due to the A/D conversion process. Hopefully bradsdr will use enough bits in his A/D converter so that the quantization noise is sufficiently below the analog noise contained in the analog signal itself. [-Rick-]> >> >> Provided the input bandwidth is perfectly filtered according to Nyquist, >> and the ADC is ideal (e.g., perfectly linear), the (digital) output of a >> properly-dithered ADC is a faithful copy of the (analog) input with the >> exception of white (wideband) noise with a power level that depends on >> the number of bits. That is, the decorrelated quantization noise. >> >> If the ADC has (theoretically) infinite bits, and assuming the >> antialiasing filter is in place and ideal, then it makes no difference >> whether filtering is done before or after the ADC when that filtering >> that is done "inside" the digital bandwidth (0 to Fs / 2 Hz). >> >> If the ADC is practical and has N bits, and again assuming the >> antialiasing filter is in place and ideal, then filtering after the ADC >> has an advantage over filtering before the ADC since a post-ADC filter >> filters out the quantization noise as well as the input noise. This >> advantage increases as the ratio of filtered bandwidth to the digital >> bandwidth (Fs / 2 Hz) gets smaller because you are filtering out more >> and more of the quantization noise. This advantage also increases as >> the number of bits in the ADC decrease. >> >> If the antialiasing filter is not perfect, then we are in a gray >> area. It may be better to do the extra filtering before the ADC >> in order to reduce aliasing that might otherwise occur because >> of the imperfect antialiasing filter. This would have to be >> examined for specific cases. >> >> Note also one very basic but important characterstic of quantized >> signals: The amount of quantization noise power depends ONLY on the >> number of bits and not the sample rate. This means that, for a given >> number of bits, the quantization noise spectral density decreases as the >> sample rate increases. This is the reason why oversampling has an >> advantage. >> >> You can see and read about oversampling in section 3 of my presentation >> on a delta signal DAC here: >> >> http://www.digitalsignallabs.com/presentation.pdf >> >> I hope this helps.
Reply by ●September 21, 20132013-09-21
On Thu, 19 Sep 2013 09:30:54 -0500, "bradsdr" <95105@dsprelated> wrote:>>"bradsdr" <95105@dsprelated> writes: >>[Snipped]> >Also there is an AGC before the ADC. Can you point out to me a good book >which deals with detail study of such topics? > >Regards, >BradHello Brad, AGC is a tricky subject. That's because it's nonlinear, time-varying, and signal-dependent. That's why most textbooks authors steer clear of that subject. The only books I know that cover AGC are [1] "Understanding Digital Signal Processing", by R. Lyons. and [2] "Digital Signal processing in Communications Systems" by M. Frerking. Good Luck, [-Rick-] PS. Book [1] is my Mother's favorite DSP book.
Reply by ●September 22, 20132013-09-22
On 9/18/2013 2:06 AM, Tim Wescott wrote:> On Wed, 18 Sep 2013 00:37:57 -0500, bradsdr wrote: > >> Hi list, >> >> Can somebody explain, or point out to documentation, the effect of input >> bandwidth of ADC on resultant SNR i.e SNR right after ADC. For example >> bandwidth of my signal of interest is 2MHz, and I can apply filter A >> (3MHz bandwidth) filter or filter B (10MHz bandwidth) filter before the >> ADC with a clock of 100MHz. My questions are: >> >> I think filter A (3MHz bandwidth) filter would give me better SNR right >> after ADC compared to filter B (10MHz bandwidth). Is that right? >> >> Is there any relation that can tell the effect of input bandwidth of ADC >> on output SNR .i.e SNR after ADC ? >> >> If I use filter B (10MHz bandwidth) filter, is there any way I can >> improve the SNR ? >> >> What other advantages/disadvantages are there if I use filter B (10MHz >> bandwidth) filter ? > > If by "with a clock of 100MHz" you mean the ADC is sampling at 100MHz, > then the effects of either filter on plain old noise will be about the > same.Why do you say that? If the signal is inside both bandwidths and the noise is evenly spread, wouldn't the more narrow filter reduce the noise by the ratio of their bandwidths? Am I missing something? Are you suggesting that noise in the input signal is less than noise added by the ADC? The sample rate of the ADC wouldn't be a factor in this case as the Nyquist bandwidth is much larger than either of the two filters. The bandwidth of the ADC could be a factor if it is actually smaller than the two filters, which I think would be unlikely. -- Rick
Reply by ●September 22, 20132013-09-22
On Sun, 22 Sep 2013 12:17:09 -0400, rickman wrote:> On 9/18/2013 2:06 AM, Tim Wescott wrote: >> On Wed, 18 Sep 2013 00:37:57 -0500, bradsdr wrote: >> >>> Hi list, >>> >>> Can somebody explain, or point out to documentation, the effect of >>> input bandwidth of ADC on resultant SNR i.e SNR right after ADC. For >>> example bandwidth of my signal of interest is 2MHz, and I can apply >>> filter A (3MHz bandwidth) filter or filter B (10MHz bandwidth) filter >>> before the ADC with a clock of 100MHz. My questions are: >>> >>> I think filter A (3MHz bandwidth) filter would give me better SNR >>> right after ADC compared to filter B (10MHz bandwidth). Is that right? >>> >>> Is there any relation that can tell the effect of input bandwidth of >>> ADC on output SNR .i.e SNR after ADC ? >>> >>> If I use filter B (10MHz bandwidth) filter, is there any way I can >>> improve the SNR ? >>> >>> What other advantages/disadvantages are there if I use filter B (10MHz >>> bandwidth) filter ? >> >> If by "with a clock of 100MHz" you mean the ADC is sampling at 100MHz, >> then the effects of either filter on plain old noise will be about the >> same. > > Why do you say that? If the signal is inside both bandwidths and the > noise is evenly spread, wouldn't the more narrow filter reduce the noise > by the ratio of their bandwidths? Am I missing something? Are you > suggesting that noise in the input signal is less than noise added by > the ADC?I'm assuming that after he gets the signal into digital-land he will be doing further processing that effectively reduces the bandwidth much further. So I should have stated that, but it's pretty much _why_ you'd be getting the signal into digital-land, so I think it's a safe assumption. If that assumption is true, and if the ADC is sampling such that no aliasing is taking place at the input, then the noise density in the region of the signal is going to be the same for either filter.> The sample rate of the ADC wouldn't be a factor in this case as the > Nyquist bandwidth is much larger than either of the two filters. The > bandwidth of the ADC could be a factor if it is actually smaller than > the two filters, which I think would be unlikely.The OP makes no definitive statements about the sampling rate of the ADC. That's why I asked for clarification. -- Tim Wescott Control system and signal processing consulting www.wescottdesign.com
Reply by ●September 23, 20132013-09-23
On Thu, 19 Sep 2013 09:49:10 -0500, "bradsdr" <95105@dsprelated> wrote:>>radams2000@gmail.com writes: >> >>> If you have large interfering signal components above your 2mhz signal >>> range then it's best to remove them in the analog domain, otherwise >>> any ADC nonlinearity could produce in-band spurs that cannot be >>> removed by subsequent digital filtering. But if the out-of-band energy >>> is just low-level noise then it probably won't make much difference >>> either way. >> >>Bob, >> >>You bring up (indirectly) a point I failed to address in my response >>yesterday. Even if the ADC had no such nonlinearities, you still have >>the problem that, since the ADC's peak input is limited, such a signal >>would require the signal-of-interest to be greatly attenuated, which in >>effect throws away a good bit of your ADC resolution. >> >>If you add the possible (and practical) nonlinearity problem in, then >>between the two it can be a serious issue. >>-- >>Randy Yates >>Digital Signal Labs >>http://www.digitalsignallabs.com >> > >Lets say my signal-of-interest is X dB, then what could be the >power/strength of interfering signal that is tolerable i.e it doesn't >affect my SNR? Sorry if I am asking wrong questionsMostly you want enough dynamic range so that the ADC output isn't pushed into saturation or other distortion. So the number of bits has to be enough to handle both the maximum expected signal plus the maximum expected sum of interference energy. Since you indicate you have an AGC, this can often be used to bound the number of bits needed for the desired signal. The number of bits needed for interference can then be determined if the interference energy is specified relative to the desired signal, e.g., +20dBc or something like tha.t>ADC I am going to use is quite good ads62p44: > >SNR(dB) 73.8 >SFDR(dB) 86 >ENOB (Bits) 11.8 >SINAD (dB) 73.4 >Input Range 2Vpp >Maximum Sample Rate: 125 MSPS >14-Bit Resolution with No Missing Codes >95 dB Crosstalk >3.5 dB Coarse Gain and Programmable Fine Gain >up to 6 dB for SNR/SFDR Trade-Off >Amplitude Down to 400 mVPP > >Regards, >Brad > > >_____________________________ >Posted through www.DSPRelated.comEric Jacobsen Anchor Hill Communications http://www.anchorhill.com
Reply by ●September 23, 20132013-09-23
eric.jacobsen@ieee.org (Eric Jacobsen) writes:> On Thu, 19 Sep 2013 09:49:10 -0500, "bradsdr" <95105@dsprelated> > wrote: > >>>radams2000@gmail.com writes: >>> >>>> If you have large interfering signal components above your 2mhz signal >>>> range then it's best to remove them in the analog domain, otherwise >>>> any ADC nonlinearity could produce in-band spurs that cannot be >>>> removed by subsequent digital filtering. But if the out-of-band energy >>>> is just low-level noise then it probably won't make much difference >>>> either way. >>> >>>Bob, >>> >>>You bring up (indirectly) a point I failed to address in my response >>>yesterday. Even if the ADC had no such nonlinearities, you still have >>>the problem that, since the ADC's peak input is limited, such a signal >>>would require the signal-of-interest to be greatly attenuated, which in >>>effect throws away a good bit of your ADC resolution. >>> >>>If you add the possible (and practical) nonlinearity problem in, then >>>between the two it can be a serious issue. >>>-- >>>Randy Yates >>>Digital Signal Labs >>>http://www.digitalsignallabs.com >>> >> >>Lets say my signal-of-interest is X dB, then what could be the >>power/strength of interfering signal that is tolerable i.e it doesn't >>affect my SNR? Sorry if I am asking wrong questions > > Mostly you want enough dynamic range so that the ADC output isn't > pushed into saturation or other distortion. So the number of bits > has to be enough to handle both the maximum expected signal plus the > maximum expected sum of interference energy. > > Since you indicate you have an AGC, this can often be used to bound > the number of bits needed for the desired signal. The number of bits > needed for interference can then be determined if the interference > energy is specified relative to the desired signal, e.g., +20dBc or > something like tha.tThanks for answering that, Eric. I neglected to respond. --Randy> >>ADC I am going to use is quite good ads62p44: >> >>SNR(dB) 73.8 >>SFDR(dB) 86 >>ENOB (Bits) 11.8 >>SINAD (dB) 73.4 >>Input Range 2Vpp >>Maximum Sample Rate: 125 MSPS >>14-Bit Resolution with No Missing Codes >>95 dB Crosstalk >>3.5 dB Coarse Gain and Programmable Fine Gain >>up to 6 dB for SNR/SFDR Trade-Off >>Amplitude Down to 400 mVPP >> >>Regards, >>Brad >> >> >>_____________________________ >>Posted through www.DSPRelated.com > > Eric Jacobsen > Anchor Hill Communications > http://www.anchorhill.com-- Randy Yates Digital Signal Labs http://www.digitalsignallabs.com
Reply by ●September 23, 20132013-09-23
"bradsdr" <95105@dsprelated> writes:>>radams2000@gmail.com writes: >> >>> If you have large interfering signal components above your 2mhz signal >>> range then it's best to remove them in the analog domain, otherwise >>> any ADC nonlinearity could produce in-band spurs that cannot be >>> removed by subsequent digital filtering. But if the out-of-band energy >>> is just low-level noise then it probably won't make much difference >>> either way. >> >>Bob, >> >>You bring up (indirectly) a point I failed to address in my response >>yesterday. Even if the ADC had no such nonlinearities, you still have >>the problem that, since the ADC's peak input is limited, such a signal >>would require the signal-of-interest to be greatly attenuated, which in >>effect throws away a good bit of your ADC resolution. >> >>If you add the possible (and practical) nonlinearity problem in, then >>between the two it can be a serious issue. >>-- >>Randy Yates >>Digital Signal Labs >>http://www.digitalsignallabs.com >> > > Lets say my signal-of-interest is X dB, then what could be the > power/strength of interfering signal that is tolerable i.e it doesn't > affect my SNR? Sorry if I am asking wrong questionsYou are not asking wrong questions at all, Brad. These are excellent questions. By the way, I apologize for taking so long to respond. The thing to remember is that you will need to limit the maximum amplitude going in to the ADC to avoid saturation. Think of the following scenario in the frequency domain: let's say you have a large undesired sine wave at 20 MHz (assuming you're sampling at 100 MHz). Just for example, let's say it is 24 dB higher than your desired signal, which is a sine wave at 1 MHz. Then that means you'll have to adjust your AGC so that the biggest signal, which is the undesired signal, is at or below your ADC reference That means that your desired sine wave is then 24 dB _below_ the full scale range of the ADC. That's just like "throwing away" 24/6 = 4 bits of your ADC. That is, if your ADC is 14 bits (as you state below), then effectively, as far as your signal of interest is concerned, your only using 10 bits of that. Of course that may still be enough, depending on other parameters in your system, but this is one of the potential problems you should consider when deciding where and how you do your system filtering. --Randy> ADC I am going to use is quite good ads62p44: > > SNR(dB) 73.8 > SFDR(dB) 86 > ENOB (Bits) 11.8 > SINAD (dB) 73.4 > Input Range 2Vpp > Maximum Sample Rate: 125 MSPS > 14-Bit Resolution with No Missing Codes > 95 dB Crosstalk > 3.5 dB Coarse Gain and Programmable Fine Gain > up to 6 dB for SNR/SFDR Trade-Off > Amplitude Down to 400 mVPP > > Regards, > Brad> > > _____________________________ > Posted through www.DSPRelated.com-- Randy Yates Digital Signal Labs http://www.digitalsignallabs.com
