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10MHz signal sampling - which DSP?

Started by martim November 11, 2013
Hello,

i would like to process an analog signal, coming out from a photodiode with
a maximum frequency content of 7-10MHz. Here my idea...i don't know if it
is something correct or not... i need your help...

1. A/D conversion, trying to aversampling the signal (at least 40-50MSPS) -
anti aliasing filter to be evaluated (9-10 bits are enough)

2. CPLD of small FPGA after the DAC (maybe a Max V or a Cyclon2/3) to
buffer the data for a DSP

3. DSP processing

4. D/A conversion - anti aliasing filter to be evaluated

These are the processing that the DSP should be able to do...

- performing a digital differentiatior, to detect positive and negative
peaks of the signal (they have typ a rising-time of 200ns...)
- extracting positive and negative envelopes of the signal
- comparing/sum of the prevoius two signal with particular scaling
constants
- sendign output stream for a D/A

My question is: can a modern DSP (a Shark) perform a so kind of elaboration
with a sampling rate like the one i indicated before??

.. probably i wrote something worng/nonsense, be patient with me, but i'm
quite new to DSP world...

Thanks in advance for your suggestions.

Bye

Bye

	 

_____________________________		
Posted through www.DSPRelated.com
On Monday, November 11, 2013 7:13:30 PM UTC-5, martim wrote:
> Hello, > > > > i would like to process an analog signal, coming out from a photodiode with > > a maximum frequency content of 7-10MHz. Here my idea...i don't know if it > > is something correct or not... i need your help... > > > > 1. A/D conversion, trying to aversampling the signal (at least 40-50MSPS) - > > anti aliasing filter to be evaluated (9-10 bits are enough) > > > > 2. CPLD of small FPGA after the DAC (maybe a Max V or a Cyclon2/3) to > > buffer the data for a DSP > > > > 3. DSP processing > > > > 4. D/A conversion - anti aliasing filter to be evaluated > > > > These are the processing that the DSP should be able to do... > > > > - performing a digital differentiatior, to detect positive and negative > > peaks of the signal (they have typ a rising-time of 200ns...) > > - extracting positive and negative envelopes of the signal > > - comparing/sum of the prevoius two signal with particular scaling > > constants > > - sendign output stream for a D/A > > > > My question is: can a modern DSP (a Shark) perform a so kind of elaboration > > with a sampling rate like the one i indicated before?? > > > > .. probably i wrote something worng/nonsense, be patient with me, but i'm > > quite new to DSP world... > > > > Thanks in advance for your suggestions. > > > > Bye > > > > Bye > > > > > > > > _____________________________ > > Posted through www.DSPRelated.com
Not sure what you mean by 7-10 MHz. If your signal frequency content is bandpass and in the range 7-10 MHz, then you can use a sample rate of 6.75 MHz which is reasonable for a DSP. If your signal frequency content is in the range 0-10 MHz, then you need a sample rate greater than 20 MHz. A SHARC will give you a few dozen FLOPS per sample at that rate. Your algorithm sounds simple, but it could still be a tall order for the SHARC. John
On Mon, 11 Nov 2013 18:13:30 -0600, martim wrote:

> Hello, > > i would like to process an analog signal, coming out from a photodiode > with a maximum frequency content of 7-10MHz. Here my idea...i don't know > if it is something correct or not... i need your help... > > 1. A/D conversion, trying to aversampling the signal (at least > 40-50MSPS) - > anti aliasing filter to be evaluated (9-10 bits are enough) > > 2. CPLD of small FPGA after the DAC (maybe a Max V or a Cyclon2/3) to > buffer the data for a DSP > > 3. DSP processing > > 4. D/A conversion - anti aliasing filter to be evaluated > > These are the processing that the DSP should be able to do... > > - performing a digital differentiatior, to detect positive and negative > peaks of the signal (they have typ a rising-time of 200ns...) > - extracting positive and negative envelopes of the signal - > comparing/sum of the prevoius two signal with particular scaling > constants - sendign output stream for a D/A > > My question is: can a modern DSP (a Shark) perform a so kind of > elaboration with a sampling rate like the one i indicated before?? > > .. probably i wrote something worng/nonsense, be patient with me, but > i'm quite new to DSP world...
It's a fairly simple algorithm and a fairly fast data rate, and you're already putting an FPGA into the mix. Why not just use the FPGA for everything? -- Tim Wescott Control system and signal processing consulting www.wescottdesign.com
On Mon, 11 Nov 2013 20:57:15 -0600, Tim Wescott
<tim@seemywebsite.please> wrote:

>On Mon, 11 Nov 2013 18:13:30 -0600, martim wrote: > >> Hello, >> >> i would like to process an analog signal, coming out from a photodiode >> with a maximum frequency content of 7-10MHz. Here my idea...i don't know >> if it is something correct or not... i need your help... >> >> 1. A/D conversion, trying to aversampling the signal (at least >> 40-50MSPS) - >> anti aliasing filter to be evaluated (9-10 bits are enough) >> >> 2. CPLD of small FPGA after the DAC (maybe a Max V or a Cyclon2/3) to >> buffer the data for a DSP >> >> 3. DSP processing >> >> 4. D/A conversion - anti aliasing filter to be evaluated >> >> These are the processing that the DSP should be able to do... >> >> - performing a digital differentiatior, to detect positive and negative >> peaks of the signal (they have typ a rising-time of 200ns...) >> - extracting positive and negative envelopes of the signal - >> comparing/sum of the prevoius two signal with particular scaling >> constants - sendign output stream for a D/A >> >> My question is: can a modern DSP (a Shark) perform a so kind of >> elaboration with a sampling rate like the one i indicated before?? >> >> .. probably i wrote something worng/nonsense, be patient with me, but >> i'm quite new to DSP world... > >It's a fairly simple algorithm and a fairly fast data rate, and you're >already putting an FPGA into the mix. > >Why not just use the FPGA for everything?
Tim beat me to it. If there's already an FPGA in the block diagram, it may be cheaper and will almost definitely consume less power if you just use a little bit larger FPGA for all of those tasks. Might even be a smaller FPGA if you were planning on a big buffer for the DSP.
>-- >Tim Wescott >Control system and signal processing consulting >www.wescottdesign.com
Eric Jacobsen Anchor Hill Communications http://www.anchorhill.com
On 11/11/2013 6:13 PM, martim wrote:

> i would like to process an analog signal, coming out from a photodiode with > a maximum frequency content of 7-10MHz. Here my idea...i don't know if it > is something correct or not... i need your help...
[...] Drop that DSP/FPGA nonsense. Do all of that processing in analog. Trivial piece of schematics and couple dozen of components is all it takes. That would be absolutely the simplest, cheapest and most efficient way. Vladimir Vassilevsky DSP and Mixed Signal Designs www.abvolt.com
On Tuesday, November 12, 2013 6:23:40 PM UTC+13, Vladimir Vassilevsky wrote:
> On 11/11/2013 6:13 PM, martim wrote: > > > > > i would like to process an analog signal, coming out from a photodiode with > > > a maximum frequency content of 7-10MHz. Here my idea...i don't know if it > > > is something correct or not... i need your help... > > > > [...] > > > > Drop that DSP/FPGA nonsense. > > Do all of that processing in analog. > > Trivial piece of schematics and couple dozen of components is all it > > takes. That would be absolutely the simplest, cheapest and most > > efficient way. > > > > Vladimir Vassilevsky > > DSP and Mixed Signal Designs > > www.abvolt.com
For once I agree with the Vampyre. Far too much digital is done nowadays and it isn't really needed.
On Mon, 11 Nov 2013 23:23:40 -0600, Vladimir Vassilevsky wrote:

> On 11/11/2013 6:13 PM, martim wrote: > >> i would like to process an analog signal, coming out from a photodiode >> with a maximum frequency content of 7-10MHz. Here my idea...i don't >> know if it is something correct or not... i need your help... > > [...] > > Drop that DSP/FPGA nonsense. > Do all of that processing in analog. > Trivial piece of schematics and couple dozen of components is all it > takes. That would be absolutely the simplest, cheapest and most > efficient way.
Depending on his accuracy requirements, you're probably right. I saw the "convert back to analog" and didn't think about the implications at all... -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
John <sampson164@gmail.com> writes:
> [...]
> Not sure what you mean by 7-10 MHz. If your signal frequency content > is bandpass and in the range 7-10 MHz, then you can use a sample rate > of 6.75 MHz which is reasonable for a DSP.
How is that reasonable for a DSP? Unless you can get some SIMD advantage, a 450 MHz SHARC 21489 (e.g.) would only give you 67 operations per sample, and that's using up the entire bandwidth. I'm on a SHARC 21489 project in which the ADC rate is 7.2 MHz, but that's highly oversampled (bandpass sampled) and we can take advantage of a lot of decimation. -- Randy Yates Digital Signal Labs http://www.digitalsignallabs.com
On Wednesday, November 13, 2013 9:35:52 AM UTC-5, Randy Yates wrote:
> John <sampson164@gmail.com> writes: > > > [...] > > > > > Not sure what you mean by 7-10 MHz. If your signal frequency content > > > is bandpass and in the range 7-10 MHz, then you can use a sample rate > > > of 6.75 MHz which is reasonable for a DSP. > > > > How is that reasonable for a DSP? Unless you can get some SIMD > > advantage, a 450 MHz SHARC 21489 (e.g.) would only give you 67 > > operations per sample, and that's using up the entire bandwidth. > > > > I'm on a SHARC 21489 project in which the ADC rate is 7.2 MHz, but > > that's highly oversampled (bandpass sampled) and we can take advantage > > of a lot of decimation. > > -- > > Randy Yates > > Digital Signal Labs > > http://www.digitalsignallabs.com
You would have to take advantage of SIMD to get into the GFLOPS. John