Phase and sampling relationship in digital demodulation

Hi
I tried to demodulate FSK (8 bit uart data caller id) according to the
theory but  was not successful unless i did bit processing at proper phase
by looking at already implemented FSK demodulator source code by some one.
  
  rxbit=demodulate();  // getting result by matched filters for 0  and 1

  if ( (prevbit != 0) && (rxbit == 0) && (FSKstatus == 10)	) //not my code
		{
		status = 9;  //for uart processing
		phase = PHASEHALF;
		sample_point=4;
		}

             if (phase >= phasemax)
              {
                process(rxbit);
               }
the data is sampled at 9600 and data rate is 1200 so 8 bit per sample need
to be processed and i am doing same in demodulator code but result is not
correct unless i process it at  phase>=phasemax.
given that 8 bit needs to be processed why and how phase relationship is
important. It would be great if any one can explain in detial or recommend
me any book that has details on bit processing at propoer phase values. i
am unable to find details about it anywhere.
Best Regards

	 

_____________________________		
Posted through www.DSPRelated.com

On 29.1.15 13:09, engrmasood2002 wrote:
> Hi
> I tried to demodulate FSK (8 bit uart data caller id) according to the
> theory but  was not successful unless i did bit processing at proper phase
> by looking at already implemented FSK demodulator source code by some one.
>
>    rxbit=demodulate();  // getting result by matched filters for 0  and 1
>
>    if ( (prevbit != 0) && (rxbit == 0) && (FSKstatus == 10)	) //not my code
> 		{
> 		status = 9;  //for uart processing
> 		phase = PHASEHALF;
> 		sample_point=4;
> 		}
>
>               if (phase >= phasemax)
>                {
>                  process(rxbit);
>                 }
> the data is sampled at 9600 and data rate is 1200 so 8 bit per sample need
> to be processed and i am doing same in demodulator code but result is not
> correct unless i process it at  phase>=phasemax.
> given that 8 bit needs to be processed why and how phase relationship is
> important. It would be great if any one can explain in detial or recommend
> me any book that has details on bit processing at propoer phase values. i
> am unable to find details about it anywhere.
> Best Regards


The demodulation (FSK decoding) is already done. Next, you have to
synchronize with the asynchronous data bits and bytes, and it seems
to be done in your example code.

Get a data sheet of any decent UART and read the description of
data reception.

-- 

-TV

On Thu, 29 Jan 2015 05:09:03 -0600, engrmasood2002 wrote:

> Hi I tried to demodulate FSK (8 bit uart data caller id) according to
> the theory but  was not successful unless i did bit processing at proper
> phase by looking at already implemented FSK demodulator source code by
> some one.

<< code snipped >>

> the data is sampled at 9600 and data rate is 1200 so 8 bit per sample
> need to be processed and i am doing same in demodulator code but result
> is not correct unless i process it at  phase>=phasemax.
> given that 8 bit needs to be processed why and how phase relationship is
> important. It would be great if any one can explain in detial or
> recommend me any book that has details on bit processing at propoer
> phase values. i am unable to find details about it anywhere.

I can never make sense of code snippets unless I really study them -- so I 
only do that for pay.

Why don't you try taking the raw data, running it through a pair of 
matched filters, then looking at the matched filter outputs as a function 
of time?  That should give you a clue if that stage is working correctly.

Then take the two matched filter outputs, and see if you can make a single 
NRZ data stream.  Again, look at it to see if it appears to be sensible.

Then, if that NRZ data stream is really intended for a UART, you should be 
able to decode it fairly easily once you understand how a UART works.

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

"engrmasood2002" <100558@dsprelated> writes:

> Hi
> I tried to demodulate FSK (8 bit uart data caller id) according to the
> theory but  was not successful unless i did bit processing at proper phase
> by looking at already implemented FSK demodulator source code by some one.
>   
>   rxbit=demodulate();  // getting result by matched filters for 0  and 1
>
>   if ( (prevbit != 0) && (rxbit == 0) && (FSKstatus == 10)	) //not my code
> 		{
> 		status = 9;  //for uart processing
> 		phase = PHASEHALF;
> 		sample_point=4;
> 		}
>
>              if (phase >= phasemax)
>               {
>                 process(rxbit);
>                }
> the data is sampled at 9600 and data rate is 1200 so 8 bit per sample need
> to be processed and i am doing same in demodulator code but result is not
> correct unless i process it at  phase>=phasemax.
> given that 8 bit needs to be processed why and how phase relationship is
> important. It would be great if any one can explain in detial or recommend
> me any book that has details on bit processing at propoer phase values. i
> am unable to find details about it anywhere.
> Best Regards

Hi,

I am also not going to try too hard to interpret your code, but somehow
you will have to "get timing" on your datastream somewhere/somehow -
your code, their code, his code, etc. If you are over sampling
synchronous (or near-synchronous) to the data rate (and it sounds like
you are with 1200 baud and 9600 samples per second), then the problem is
fairly simple: determine which one of the 8 samples per baud lies at or
near the center of the baud interval. This is typically using a
synchronization sequence.
-- 
Randy Yates
Digital Signal Labs
http://www.digitalsignallabs.com