Hi, I have a fully digital receiver where timing recovery and equalizer are adding significant latency and I would like to try and reduce it as much as possible. The timing recovery is done with a fractional delay filter (a farrow type FIR filter) where only one fractional value which gets multiplied by the outputs of the multi-branch fixed FIR filters is adapted. The equalizer is a fully adaptive FIR filter. The question I have is whether there is anyway of somehow merging the two filters or any optimization which might help me reduce the total latency of this block. Currently the output of the ADC goes first through the timing recovery filter and then the equalizer so the filters delays accumulate. Any ideas or suggestions would be appreciated. Thanks.
timing recovery & equalizer latency
Started by ●September 21, 2004
Reply by ●September 21, 20042004-09-21
kal<kal@delete.dspia.com> writes:> Hi, > I have a fully digital receiver where timing recovery and equalizer > are adding significant latency and I would like to try and reduce it > as much as possible. > The timing recovery is done with a fractional delay filter (a farrow > type FIR filter) where only one fractional value which gets multiplied > by the outputs of the multi-branch fixed FIR filters is adapted. The > equalizer is a fully adaptive FIR filter. The question I have is > whether there is anyway of somehow merging the two filters or any > optimization which might help me reduce the total latency of this > block. Currently the output of the ADC goes first through the timing > recovery filter and then the equalizer so the filters delays > accumulate. > Any ideas or suggestions would be appreciated.Hi Kal, This is from the 30000-foot level and off-the-cuff, but isn't the timing recovery circuit essentially a control loop? If that control loop isn't responding fast enough, then maybe you can examine the loop bandwidth??? -- % Randy Yates % "Bird, on the wing, %% Fuquay-Varina, NC % goes floating by %%% 919-577-9882 % but there's a teardrop in his eye..." %%%% <yates@ieee.org> % 'One Summer Dream', *Face The Music*, ELO http://home.earthlink.net/~yatescr
Reply by ●September 21, 20042004-09-21
kal<kal@delete.dspia.com> wrote in message news:<hqhvk0hv9gqlslqf5cq357jkfudlf6af5c@4ax.com>...> Hi, > I have a fully digital receiver where timing recovery and equalizer > are adding significant latency and I would like to try and reduce it > as much as possible. > The timing recovery is done with a fractional delay filter (a farrow > type FIR filter) where only one fractional value which gets multiplied > by the outputs of the multi-branch fixed FIR filters is adapted. The > equalizer is a fully adaptive FIR filter. The question I have is > whether there is anyway of somehow merging the two filters or any > optimization which might help me reduce the total latency of this > block. Currently the output of the ADC goes first through the timing > recovery filter and then the equalizer so the filters delays > accumulate. > Any ideas or suggestions would be appreciated.I suppose that the timing error signal you are deriving is based on equalizer output. This would make latency as well as adaptability of the entire feedback system an issue. I guess if your design allows it - the latency can be solved if timing error signal is derived before equalizer. Depends on whethert your system allows it or not. HTH, Sachin
Reply by ●September 28, 20042004-09-28
On 21 Sep 2004 10:17:24 -0700, scngupta@yahoo.com (Sachin Gupta) wrote:>kal<kal@delete.dspia.com> wrote in message news:<hqhvk0hv9gqlslqf5cq357jkfudlf6af5c@4ax.com>... >> Hi, >> I have a fully digital receiver where timing recovery and equalizer >> are adding significant latency and I would like to try and reduce it >> as much as possible. >> The timing recovery is done with a fractional delay filter (a farrow >> type FIR filter) where only one fractional value which gets multiplied >> by the outputs of the multi-branch fixed FIR filters is adapted. The >> equalizer is a fully adaptive FIR filter. The question I have is >> whether there is anyway of somehow merging the two filters or any >> optimization which might help me reduce the total latency of this >> block. Currently the output of the ADC goes first through the timing >> recovery filter and then the equalizer so the filters delays >> accumulate. >> Any ideas or suggestions would be appreciated. > >I suppose that the timing error signal you are deriving is based on >equalizer output. This would make latency as well as adaptability of >the entire feedback system an issue. I guess if your design allows it >- the latency can be solved if timing error signal is derived before >equalizer. Depends on whethert your system allows it or not.How would you go about solving the latency if no feedback through the equalizer existed ? My timing error detector is completely feed-forward. The problem is with the cumulative delay of timing correction and equalizer.
