My application is going to need a bit of fixed point, a bit of floating point calculations. Any advice as to whether a 720MHz fixed point processor (TI C64x) executing floating point libraries, can compete with a 225MHz floating point processor (TI C67x) ? Regards Nick
floating point v fixed point
Started by ●June 25, 2003
Reply by ●June 26, 20032003-06-26
Nick ELLIOTT wrote:> > My application is going to need a bit of fixed point, a bit of floating > point calculations. > Any advice as to whether a 720MHz fixed point processor (TI C64x) executing > floating point libraries, can compete with a 225MHz floating point processor > (TI C67x) ? > > Regards > NickThat has to depend on how bib that "bit" of fp is compared to the FP. Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
Reply by ●June 26, 20032003-06-26
"Nick ELLIOTT" <elliotts-in-nz@xtra.co.nz> wrote in message news:gLrKa.50775$JA5.897875@news.xtra.co.nz...> My application is going to need a bit of fixed point, a bit of floating > point calculations. > Any advice as to whether a 720MHz fixed point processor (TI C64x)executing> floating point libraries, can compete with a 225MHz floating pointprocessor> (TI C67x) ?You can take the floating-point calculations you require and compile/assemble them for both processors. Simulating the resultant code for both DSPs should give you an accurate comparison. I've done this sort of thing for ADI DSPs, when I had two alternative FP techniques. Leon -- Leon Heller, G1HSM leon_heller@hotmail.com http://www.geocities.com/leon_heller
Reply by ●June 26, 20032003-06-26
Nick ELLIOTT wrote:> > My application is going to need a bit of fixed point, a bit of floating > point calculations. > Any advice as to whether a 720MHz fixed point processor (TI C64x) executing > floating point libraries, can compete with a 225MHz floating point processor > (TI C67x) ? > > Regards > NickThat has to depend on how big that "bit" of fp is compared to the FP. Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
Reply by ●June 26, 20032003-06-26
Hi Nick If you are doing floating point for setting up coefficients, FP emulation is not that big of a pain. On the other hand, if FP is needed within the main DSP loop (each data sample)... ouch! This results from the fact that to do the FP emulation (on a fix pt machine) the exponent and mantissa math operations are performed seperately, typicaly on structures that are kept in memory and or registers (if you have a gazillion of them to burn). Also, since the ADDF and MPYF operations are now seperate entities, there is no such thing as a MPF||ADDF parallel 'MAC' operation. A multitude of ouches! Incidentally, this is also true when you are trying to do 32 bit math on a 16 bit processor. Here you will find the overhead to be large for a dual MAC architecture since the setup and register usage can be large not to mention the deep pipelines. These types of architectures are really suited for chunking through vast arrays of data that are setup in advance. Finally, since (most) Floating Point CPU's also have fixed point capability, it is much easier to go in the other direction as needed. The downside is that processors like the one I support (the VC33) want to only work with 32 bit data. 16 bit (and shorter) data is not an automatic type. The bottom line is that you need to wade through the BS and pick the processor that best fits the job and these days more importantly, budget. And dont be fooled into thinking budget is simply the cost of the DSP! Best regards, Keith Larson ============================ Nick ELLIOTT wrote:> My application is going to need a bit of fixed point, a bit of floating > point calculations. > Any advice as to whether a 720MHz fixed point processor (TI C64x) executing > floating point libraries, can compete with a 225MHz floating point processor > (TI C67x) ? > > Regards > Nick+------------------------------------------+ |Keith Larson | |Member Group Technical Staff | |Texas Instruments Incorporated | | | | 281-274-3288 | | k-larson2@ti.com | |------------------------------------------+ | TMS320C3x/C4x/VC33 Applications | | | | TMS320VC33 | | The lowest cost and lowest power | | floating point DSP on the planet! | | 500uw/Mflop | +------------------------------------------+
Reply by ●June 30, 20032003-06-30
say 50:50 -- "Jerry Avins" <jya@ieee.org> wrote in message news:3EFA72BA.97D6C72@ieee.org...> Nick ELLIOTT wrote: > > > > My application is going to need a bit of fixed point, a bit of floating > > point calculations. > > Any advice as to whether a 720MHz fixed point processor (TI C64x)executing> > floating point libraries, can compete with a 225MHz floating pointprocessor> > (TI C67x) ? > > > > Regards > > Nick > > That has to depend on how bib that "bit" of fp is compared to the FP. > > Jerry > -- > Engineering is the art of making what you want from things you can get. > �����������������������������������������������������������������������
Reply by ●June 30, 20032003-06-30
| --
| "Jerry Avins" <jya@ieee.org> wrote in message
| news:3EFA72BA.97D6C72@ieee.org...
| > Nick ELLIOTT wrote:
| > >
| > > My application is going to need a bit of fixed point, a bit of floating
| > > point calculations.
| > > Any advice as to whether a 720MHz fixed point processor (TI C64x)
| executing
| > > floating point libraries, can compete with a 225MHz floating point
| processor
| > > (TI C67x) ?
| > >
| > > Regards
| > > Nick
| >
| > That has to depend on how bib that "bit" of fp is compared to the FP.
"Nick ELLIOTT" <elliotts-in-nz@xtra.co.nz> replied:
| say 50:50
It probably won't perform anywhere near what you need, then. Software
FP requires breaking up the data into components (sign, exponent,
significand), significand alignment, operation, renormalization, and
repacking the components. For FP addition (the hardest), it is probably
50 cycles or so. To get a very rough idea we can use Amdahl's law:
sw fp performance = 1/(1/2 + 20/2) = ~9%
So with a 50:50 mix of FP and integer, a 720MHz software-only solution
is only going to perform about like a 65MHz hardware FP solution.
--
-- Tim Olson
Reply by ●July 3, 20032003-07-03
/ bias on Have a look at the TS101S or TS201S (ADI's TigerSharcs). These have a dual floating point core that can also run fixed (32,16,8) in parallel instead of floats, i.e. you get both. TS101s are at 300 MHz, and TS201S are 500-600 MHz (but very new). / bias off Nick ELLIOTT wrote:> > My application is going to need a bit of fixed point, a bit of floating > point calculations. > Any advice as to whether a 720MHz fixed point processor (TI C64x) executing > floating point libraries, can compete with a 225MHz floating point processor > (TI C67x) ? > > Regards > Nick
