Software modulation timing issue

Hello,

I am developing a software modulator and am currently working on the
qpsk portion of it.  This problem will apply to pretty much all
modulation schemes however.  Let me first explain my algorithm:

This program needs to be very fast (capable 100 mhz sampling rates) so
I am pregenerating all of my samples.  The user inputs the center
frequency and the sampling rate and I fill a series of buffers with a
period worth of samples for each of the 4 phase offsets
(0,pi/2,pi,3pi/2).

The problem comes in with my calculation of how many samples are
needed for a period.  If the center frequency is 1Mhz and sample rate
is 10 Mhz there is no problem.  The number of samples/period is 
(sample rate)/(frequency) = 10 samples.
Now, if I use a frequency of 1.2 Mhz and a sample rate of 20 Mhz, I
get 16 2/3 samples in a period.  Obviously I cannot represent 2/3 of a
sample and my timing is thrown off.

This problem also occurs when deciding how many samples should be
output for a symbol.  If (sample rate)/(symbol rate) doesn't come out
to be an integer, my timing is thrown off for the symbol rate.


Any ideas? I have thought about some kind of sample averaging method,
but I am not sure.

Well i know no one responded, but I thought possibly someone would be
interested in the solution.

Lets say we have a symbol rate of 1.2 Mhz and sample rate of 20 Mhz.
20 / 1.2 = 16 2/3

To account for the problematic 2/3 sample, we simply over compensate
and under compensate with relation to the fractional sample.  So for 16
2/3 samples we use 16 and 17 samples.  Since the fraction is 2/3 we
output  the following:

symbol n: 17 samples
symbol n+1: 17 samples
symbol n+2: 16 samples

This pattern will then repeat.