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Impact of complex limiter on BPSK BER

Started by John Sampson October 29, 2004
I am working on a fixed-point DSP-based coherent BPSK modem. In order
to improve the computational dynamic range of the clock recovery and
carrier tracking algorithms, I put a complex limiter on the complex
baseband. It comes after the signal has been filtered with a
rectangular pulse with length equal to one bit time. What it does is
compute phi=atan2(y/x) and then looks up sin(phi) and cos(phi) in a
table.

The goal here is to have an implementation loss of a few tenths of a
dB in AWGN at 10% BER and above. In tracking down tenths of dB's, I
have wondered if the complex limiter might actually reduce sensitivity
by folding some noise in band. So far, taking it out has screwed up
the clock and carrier recovery so I can't make an assessment.

Any comments?

Thanks,

John
John Sampson wrote:

> I am working on a fixed-point DSP-based coherent BPSK modem. In order > to improve the computational dynamic range of the clock recovery and > carrier tracking algorithms, I put a complex limiter on the complex > baseband. It comes after the signal has been filtered with a > rectangular pulse with length equal to one bit time. What it does is > compute phi=atan2(y/x) and then looks up sin(phi) and cos(phi) in a > table. > > The goal here is to have an implementation loss of a few tenths of a > dB in AWGN at 10% BER and above. In tracking down tenths of dB's, I > have wondered if the complex limiter might actually reduce sensitivity > by folding some noise in band. So far, taking it out has screwed up > the clock and carrier recovery so I can't make an assessment. > > Any comments? > > Thanks, > > John
Yes, but no conclusions: * In general you will be folding noise in band, and reducing your clock recovery accuracy. * But if you have rectangular pulses that means you're using a matched filter. I wouldn't be surprised if this isn't optimal, but I'd have to crank through some math before I knew. * It may be computationally less intensive to calculate y/sqrt(y^2+x^2) and x/sqrt(y^2+x^2) -- but maybe not, since both sqrt and atan2 are horrid from a computational standpoint. Depending on your processor, limiting your data to an octagon on the complex plane instead of a circle may be much more computationally efficient (or maybe not), but I _do_ suspect that you won't lose much phase information. * Are you just calculating BER vs. noise level? Calculating BER for a known clock phase is a relative snap because it's a linear channel with additive Gaussian noise. Taking clock recovery into account can be mind-bending because the clock recovery algorithm is certainly not linear, and it's complicated even more because you have to know about the clock drift of your local reference vs. the source, so you can set PLL characteristics. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
johns@xetron.com (John Sampson) writes:

> I am working on a fixed-point DSP-based coherent BPSK modem. In order > to improve the computational dynamic range of the clock recovery and > carrier tracking algorithms, I put a complex limiter on the complex > baseband. It comes after the signal has been filtered with a > rectangular pulse with length equal to one bit time. What it does is > compute phi=atan2(y/x) and then looks up sin(phi) and cos(phi) in a > table. > > The goal here is to have an implementation loss of a few tenths of a > dB in AWGN at 10% BER and above. In tracking down tenths of dB's, I > have wondered if the complex limiter might actually reduce sensitivity > by folding some noise in band. So far, taking it out has screwed up > the clock and carrier recovery so I can't make an assessment. > > Any comments?
John, If you have the MIPS, you could try oversampling the complex signal before limiting it, then decimating the result. That would remove some (or nearly all, depending on the oversampling ratio) of the folding of the harmonics resulting from the nonlinearity from aliasing back in band. Use polyphase techniques to reduce your interpolation and decimation computational complexity. -- Randy Yates Sony Ericsson Mobile Communications Research Triangle Park, NC, USA randy.yates@sonyericsson.com, 919-472-1124
"John Sampson" <johns@xetron.com> wrote in message
news:ae739955.0410290528.11350306@posting.google.com...
> I am working on a fixed-point DSP-based coherent BPSK modem. In order > to improve the computational dynamic range of the clock recovery and > carrier tracking algorithms, I put a complex limiter on the complex > baseband. It comes after the signal has been filtered with a > rectangular pulse with length equal to one bit time. What it does is > compute phi=atan2(y/x) and then looks up sin(phi) and cos(phi) in a > table. > > The goal here is to have an implementation loss of a few tenths of a > dB in AWGN at 10% BER and above. In tracking down tenths of dB's, I > have wondered if the complex limiter might actually reduce sensitivity > by folding some noise in band. So far, taking it out has screwed up > the clock and carrier recovery so I can't make an assessment. > > Any comments? > > Thanks, > > John
Hi John - you might want to look at the viterbi and viterbi estimator, Andrew and Audrey published a joint paper some time back. If I remember correctly it looked at the difference between hard limiting , linear wieghting and a square-law scheme for the phase recovery in non-data-aided QPSK but the technique should easily extend to BPSK. In awgn the hard-limiter had rather bad performance at low Eb/No so at around 10% BER I expect that you are right to worry. Some young lady from alcatel espace also published a tree search method for phase/frequency tracking with fairly low complexity. At one stage they were calling it the barycentre algorithm ( and may have patented some version of it). If you look for phase estimation and Boucheret I think you will eventually find it. best pf luck - Mike
Tim Wescott <tim@wescottnospamdesign.com> wrote in message news:<10o4koobp5nel5a@corp.supernews.com>...
> John Sampson wrote: > > > I am working on a fixed-point DSP-based coherent BPSK modem. In order > > to improve the computational dynamic range of the clock recovery and > > carrier tracking algorithms, I put a complex limiter on the complex > > baseband. It comes after the signal has been filtered with a > > rectangular pulse with length equal to one bit time. What it does is > > compute phi=atan2(y/x) and then looks up sin(phi) and cos(phi) in a > > table. > > > > The goal here is to have an implementation loss of a few tenths of a > > dB in AWGN at 10% BER and above. In tracking down tenths of dB's, I > > have wondered if the complex limiter might actually reduce sensitivity > > by folding some noise in band. So far, taking it out has screwed up > > the clock and carrier recovery so I can't make an assessment. > > > > Any comments? > > > > Thanks, > > > > John > > Yes, but no conclusions: > > * In general you will be folding noise in band, and reducing your clock > recovery accuracy.
I oversample by as much as 40 samples/bit, should help with noise folding in.
> > * But if you have rectangular pulses that means you're using a matched > filter. I wouldn't be surprised if this isn't optimal, but I'd have to > crank through some math before I knew. > > * It may be computationally less intensive to calculate y/sqrt(y^2+x^2) > and x/sqrt(y^2+x^2) -- but maybe not, since both sqrt and atan2 are > horrid from a computational standpoint. Depending on your processor, > limiting your data to an octagon on the complex plane instead of a > circle may be much more computationally efficient (or maybe not), but I > _do_ suspect that you won't lose much phase information.
I'm not too concerned with efficiency at this point, but atan2 + exp is a little faster than sqrt + 2 divides. I'm using a TI '5416.
> > * Are you just calculating BER vs. noise level? Calculating BER for a > known clock phase is a relative snap because it's a linear channel with > additive Gaussian noise. Taking clock recovery into account can be > mind-bending because the clock recovery algorithm is certainly not > linear, and it's complicated even more because you have to know about > the clock drift of your local reference vs. the source, so you can set > PLL characteristics.
I send random data and set every 12th bit to zero. Then I frame the data in 12 bit frames and look down the columns to find the one with least variance and count errors in that column only. So it includes clock and carrier recovery. I compare my results to the textbook coherent BPSK BER: ebno = 20*log10(erfinv(1-2*ber)). Thanks! John
Randy Yates <randy.yates@sonyericsson.com> wrote in message news:<xxp7jp95vth.fsf@usrts005.corpusers.net>...
> johns@xetron.com (John Sampson) writes: > > > I am working on a fixed-point DSP-based coherent BPSK modem. In order > > to improve the computational dynamic range of the clock recovery and > > carrier tracking algorithms, I put a complex limiter on the complex > > baseband. It comes after the signal has been filtered with a > > rectangular pulse with length equal to one bit time. What it does is > > compute phi=atan2(y/x) and then looks up sin(phi) and cos(phi) in a > > table. > > > > The goal here is to have an implementation loss of a few tenths of a > > dB in AWGN at 10% BER and above. In tracking down tenths of dB's, I > > have wondered if the complex limiter might actually reduce sensitivity > > by folding some noise in band. So far, taking it out has screwed up > > the clock and carrier recovery so I can't make an assessment. > > > > Any comments? > > John, > > If you have the MIPS, you could try oversampling the complex signal before > limiting it, then decimating the result. That would remove some (or nearly > all, depending on the oversampling ratio) of the folding of the harmonics > resulting from the nonlinearity from aliasing back in band. Use polyphase > techniques to reduce your interpolation and decimation computational > complexity.
Randy, Thanks for the suggestion. I thought of this, and do oversample at the complex limiter. Currently I have it set to 40 samples/bit. John
John Sampson wrote:

  ...

> I'm not too concerned with efficiency at this point, but atan2 + exp is > a little faster than sqrt + 2 divides. I'm using a TI '5416.
... 1/sqrt() can be a little faster than sqrt(), and then you do two multiplies. That's noticeably faster. Jerry -- Engineering is the art of making what you want from things you can get. &#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;
On 29 Oct 2004 06:28:23 -0700, johns@xetron.com (John Sampson) wrote:

>I am working on a fixed-point DSP-based coherent BPSK modem. In order >to improve the computational dynamic range of the clock recovery and >carrier tracking algorithms, I put a complex limiter on the complex >baseband. It comes after the signal has been filtered with a >rectangular pulse with length equal to one bit time. What it does is >compute phi=atan2(y/x) and then looks up sin(phi) and cos(phi) in a >table. > >The goal here is to have an implementation loss of a few tenths of a >dB in AWGN at 10% BER and above. In tracking down tenths of dB's, I >have wondered if the complex limiter might actually reduce sensitivity >by folding some noise in band. So far, taking it out has screwed up >the clock and carrier recovery so I can't make an assessment. > >Any comments?
You've gotten some good input, but I'll add a little FWIW: How are you implementing the complex limiter? It needs to be in polar form so that the magnitude of the vector is limited and the phase unaffected. I _think_ this is what you mean by a complex limiter, so I hope that's already what you're doing. If you just limit I and Q independently you will add phase distortion which will do nasty things to the carrier recovery loop. The difference is whether you're limiting magnitude within a circle or a square. Circle good; square bad. Depending on the phase detector you're using for your symbol recovery loop, it may not like limiting at all. Make sure the symbol recovery phase detector is appropriate for use in a system with hard limiting. It sounds like you're using an integrate and dump filter if you're trying to match to rectangular pulses. This is fine if it fits your application, and there is a ton of literature on how to build loops around these. Do you limit before or after the integrate and dump? BTW, your goal is attainable. I've seen modems with 70MHz IF come off production lines with end-to-end implementation loss of 0.3dB. That's the edge of the distribution, and typical was 0.4-0.5dB. Getting 0.2-0.3dB at the baseband is definitely attainable. Digital-to-digital you can get it close enough that it's hard to measure. Eric Jacobsen Minister of Algorithms, Intel Corp. My opinions may not be Intel's opinions. http://www.ericjacobsen.org
eric.jacobsen@ieee.org (Eric Jacobsen) wrote in message news:<418402ce.49473765@news.west.cox.net>...
> On 29 Oct 2004 06:28:23 -0700, johns@xetron.com (John Sampson) wrote: > > >I am working on a fixed-point DSP-based coherent BPSK modem. In order > >to improve the computational dynamic range of the clock recovery and > >carrier tracking algorithms, I put a complex limiter on the complex > >baseband. It comes after the signal has been filtered with a > >rectangular pulse with length equal to one bit time. What it does is > >compute phi=atan2(y/x) and then looks up sin(phi) and cos(phi) in a > >table. > > > >The goal here is to have an implementation loss of a few tenths of a > >dB in AWGN at 10% BER and above. In tracking down tenths of dB's, I > >have wondered if the complex limiter might actually reduce sensitivity > >by folding some noise in band. So far, taking it out has screwed up > >the clock and carrier recovery so I can't make an assessment. > > > >Any comments? > > You've gotten some good input, but I'll add a little FWIW: > > How are you implementing the complex limiter? It needs to be in > polar form so that the magnitude of the vector is limited and the > phase unaffected. I _think_ this is what you mean by a complex > limiter, so I hope that's already what you're doing. If you just > limit I and Q independently you will add phase distortion which will > do nasty things to the carrier recovery loop. The difference is > whether you're limiting magnitude within a circle or a square. Circle > good; square bad.
Circle. I divide each complex sample by its magnitude.
> > Depending on the phase detector you're using for your symbol recovery > loop, it may not like limiting at all. Make sure the symbol recovery > phase detector is appropriate for use in a system with hard limiting.
The complex limited, match filtered data is passed through a nonlinearity (half-bit delay-conjugate-multiply, keep real part) and a 2nd order IIR BPF. Then a 2nd order PLL is locked to that. The phase detector is simple, just sample the NCO on rising edges of the BPF.
> > It sounds like you're using an integrate and dump filter if you're > trying to match to rectangular pulses. This is fine if it fits your > application, and there is a ton of literature on how to build loops > around these. Do you limit before or after the integrate and dump?
The integrate and dump is a sliding one bit boxcar, before the complex limiter and before symbol timing and carrier recovery. I have interchanged the complex liminter and matched filter, not much difference noticed.
> > BTW, your goal is attainable. I've seen modems with 70MHz IF come off > production lines with end-to-end implementation loss of 0.3dB. That's > the edge of the distribution, and typical was 0.4-0.5dB. Getting > 0.2-0.3dB at the baseband is definitely attainable. > Digital-to-digital you can get it close enough that it's hard to > measure.
Out of curiosity, down to what BER did that performance hold? I probably have one of your old modems at work somewhere. I am getting results distributed from 0.1-0.7 dB, digital to digital. The demod has 8 different data rates, and the IL varies by data rate. It also varies depending on how many ppm bit timing error I introduce. I am using a fractional decimator based on a cubic polynomial to get to integer samples/bit, and the IL seems to worsen as the decimation ratio goes down. Decimating by a number close to 1 seems to work best. Thanks for your comments! John
The limiter will definitely impact your AWGN BER. The loss is as high as 
about 1dB at the reasonable BERs of 0.01...0.001. It is going to be much 
worse with CW interference.

Vladimir Vassilevsky

DSP and Mixed Signal Design Consultant

http://www.abvolt.com


John Sampson wrote:

> I am working on a fixed-point DSP-based coherent BPSK modem. In order > to improve the computational dynamic range of the clock recovery and > carrier tracking algorithms, I put a complex limiter on the complex > baseband. It comes after the signal has been filtered with a > rectangular pulse with length equal to one bit time. What it does is > compute phi=atan2(y/x) and then looks up sin(phi) and cos(phi) in a > table. > > The goal here is to have an implementation loss of a few tenths of a > dB in AWGN at 10% BER and above. In tracking down tenths of dB's, I > have wondered if the complex limiter might actually reduce sensitivity > by folding some noise in band. So far, taking it out has screwed up > the clock and carrier recovery so I can't make an assessment. > > Any comments? > > Thanks, > > John