Sample and Hold affects phase of fundamental signal?

Hello. Is there an expression that relates a total phase shift of a
samled to signal to the fundamental frequency of the signal and the
frequency at which it was sampled?

The reason why I ask this is because I have been noticing through some
simulations that if I sample a 60Hz signal with a "sample and hold
block" at some frequency I will get a phase shift in the fundamental
component of the sampled signal. This phase shift seems to be reduced
as I increae the frequency at which I sample the 60 Hz signal. I have
numerically determined this phase shift by doing fourier analysis on
the sampled output signal.

Is there an expression that will let me determine the theoretical shift
due to a fundamental and a sampling frequency?

Thank you in advance.

What is the sample rate?
What is the corresponding time shift (compute from phase shift for some
frequency)?

Dirk

stuffed_penguin@yahoo.com wrote:
> Hello. Is there an expression that relates a total phase shift of a
> samled to signal to the fundamental frequency of the signal and the
> frequency at which it was sampled?
> 
> The reason why I ask this is because I have been noticing through some
> simulations that if I sample a 60Hz signal with a "sample and hold
> block" at some frequency I will get a phase shift in the fundamental
> component of the sampled signal. This phase shift seems to be reduced
> as I increae the frequency at which I sample the 60 Hz signal. I have
> numerically determined this phase shift by doing fourier analysis on
> the sampled output signal.
> 
> Is there an expression that will let me determine the theoretical shift
> due to a fundamental and a sampling frequency?
> 
> Thank you in advance.

Are you sure that you aren't seeing the effects of aperture time? There 
should be no phase shift with very narrow samples. Especially in a 
simulation, the sampling instant effectively moves to the end of the 
sample gate.

Jerry
-- 
Engineering is the art of making what you want from things you can get.
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But why should the phase of the signal get affected by sampling.

Neo wrote:
> But why should the phase of the signal get affected by sampling.

Not by the sampling, but by the sample and hold.
The analog signal is "frozen" in time allowing a
slow ADC to do its job, which takes time. The time
delay between the analog signal being "frozen" and
the ADC popping out a number causes the phase change.

Rune

"Rune Allnor" <allnor@tele.ntnu.no> wrote in message 
news:1110526873.847832.260880@o13g2000cwo.googlegroups.com...
>
> Neo wrote:
>> But why should the phase of the signal get affected by sampling.
>
> Not by the sampling, but by the sample and hold.
> The analog signal is "frozen" in time allowing a
> slow ADC to do its job, which takes time. The time
> delay between the analog signal being "frozen" and
> the ADC popping out a number causes the phase change.
>
> Rune
>
stuffed_penguin ; you can check if this is what's happening by putting two 
(or more) different frequencies at your ADC input and seeing if the relative 
'phase shift' corresponds to a pure delay . When you change your sample rate 
you can then see how the delay changes with sample rate. - Best of Luck - 
Mike
 

"Rune Allnor" <allnor@tele.ntnu.no> wrote in message news:<1110526873.847832.260880@o13g2000cwo.googlegroups.com>...
> Neo wrote:
> > But why should the phase of the signal get affected by sampling.
> 
> Not by the sampling, but by the sample and hold.
> The analog signal is "frozen" in time allowing a
> slow ADC to do its job, which takes time. The time
> delay between the analog signal being "frozen" and
> the ADC popping out a number causes the phase change.
> 
> Rune

Yes, you are right!

the zero order holder introduces a phase delay.

in other words, the sampled and "holded" signal contains the factor

e^-j2.pi.f.T/2 (1)

in its fourier transform, where f is the domain of the Fourier
transform and T is the sampling period.

increasing the sampling rate reduces the phase shift by reducing T.
the phase delay at 60Hz would be 6,28 * 60 * T/2 [rad].

check if this fits your experimental result.

you can check it also this way.
sample the 60Hz "unit" sinusoid at twice its freq. (120Hz),  
you'll have 2 samples each semiperiod. 
suppose your bitstream is 0 1 0 -1  0 1 0 -1 ..and so on..

if your process your bistream with a zero order holder you obtain a
squeare wave
"delayed" of Pi/2 [rad] respect to the original sampled signal.

apply (1) : 2 * pi * 60 * 1/120 * 1/2 = pi/2  [rad]

obtaining (1) analitically is preatty easy.

Bye

Thank you very much, that explains it and the expression: 6,28 * 60 *
T/2 [rad]   gives results very close to what i am getting with
different sampling frequencies. Thank you all for your help!


Jack Ace wrote:
> "Rune Allnor" <allnor@tele.ntnu.no> wrote in message
news:<1110526873.847832.260880@o13g2000cwo.googlegroups.com>...
> > Neo wrote:
> > > But why should the phase of the signal get affected by sampling.
> >
> > Not by the sampling, but by the sample and hold.
> > The analog signal is "frozen" in time allowing a
> > slow ADC to do its job, which takes time. The time
> > delay between the analog signal being "frozen" and
> > the ADC popping out a number causes the phase change.
> >
> > Rune
>
> Yes, you are right!
>
> the zero order holder introduces a phase delay.
>
> in other words, the sampled and "holded" signal contains the factor
>
> e^-j2.pi.f.T/2 (1)
>
> in its fourier transform, where f is the domain of the Fourier
> transform and T is the sampling period.
>
> increasing the sampling rate reduces the phase shift by reducing T.
> the phase delay at 60Hz would be 6,28 * 60 * T/2 [rad].
>
> check if this fits your experimental result.
>
> you can check it also this way.
> sample the 60Hz "unit" sinusoid at twice its freq. (120Hz),
> you'll have 2 samples each semiperiod.
> suppose your bitstream is 0 1 0 -1  0 1 0 -1 ..and so on..
>
> if your process your bistream with a zero order holder you obtain a
> squeare wave
> "delayed" of Pi/2 [rad] respect to the original sampled signal.
>
> apply (1) : 2 * pi * 60 * 1/120 * 1/2 = pi/2  [rad]
> 
> obtaining (1) analitically is preatty easy.
> 
> Bye

in article 1110526873.847832.260880@o13g2000cwo.googlegroups.com, Rune
Allnor at allnor@tele.ntnu.no wrote on 03/11/2005 02:41:


> Neo wrote:
>> But why should the phase of the signal get affected by sampling.
> 
> Not by the sampling, but by the sample and hold.
> The analog signal is "frozen" in time allowing a
> slow ADC to do its job, which takes time. The time
> delay between the analog signal being "frozen" and
> the ADC popping out a number causes the phase change.

it's commonly shown in some of the texts that the S/H can be modeling as an
ideal Nyquist/Shannon sampler (which does not change phase) followed by a
"Zero-order-hold" (ZOH) and that the ZOH is a linear time-invariant system
with properly scaled transfer function:

    H(s) = (1 - exp(-s*T))/(sT)

if you plug in s = jw, you get


    H(jw) = (1 - exp(-j*w*T))/(j*w*T)



          = exp(-j*w*T/2) * sinc(w*T)

so, except for the delay of 1/2 sample, you have a purely real frequency
response which would make be believe that there is a delay of 1/2 sample and
that should affect phase.


-- 

r b-j                  rbj@audioimagination.com

"Imagination is more important than knowledge."

Neo wrote:
> But why should the phase of the signal get affected by sampling.

Check your simulation. When does the sample-and-hold lock the signal 
value? (I guess at the end of the aperture time.) When is the sample 
assumed to have been taken? (I guess at the beginning of the aperture 
time.) Is the sampling aperture inversely proportional to the sample 
rate? (I guess is that it is.)

If my guesses are correct, your simulation is lying.

Jerry
-- 
Engineering is the art of making what you want from things you can get.
�����������������������������������������������������������������������