Efficient Polyphase FIR Decimators and Interpolators

How to design Decimator with the extra filter A(z) at the output and
Interpolator with the extra filter A(z) at the input. ..
x(n) is the input
Fs = 24 in the input sampling rate
M= 6 is the number of subfilter

In case decimator A(z) is operated at output sample rate . as Fs/M ..where
M is 6 .Fs is the input sampling rate. 
In case Interpolator A(z) is placed at the input and operates at input
sampling rate ie 24khz.
specification:
Bandwidth =1khz
transition bandwidth =0.25khz
inband ripple is 0.1
outband attenuation is 80db
filter length =348

.
i have doubt in designing the A(z).
is there any specific formula to design kernel filter A(z)

Thank you in advance


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