I'm working on a couple of demodulators - one for 1200 baud AFSK (and possibly other bitrates) and one for 9600 baud baseband FSK - and I've got some questions. I'm using an ARM7TDMI chip, so I'm rather CPU constrained. An issue I'm having trouble with is that the CODEC I'm considering offers sample rates in multiples of 8 khz. It seems to me that any of the demodulation techniques I'm testing would be easier to implement if the sample rate was an integer multiple of the baud rate. Is this true, or is there a technique that's not as sensitive to this? I don't think I can spare the cycles to sample at a high rate and decimate to the desired rate. Next question - how can I tell how many bits of resolution are going to be needed to get good decode performance for the 9600 baud demodulator? Because of the CODEC problems I'm considering switching to the on-board 10-bit ADC. I know this is more than sufficient for 1200 baud AFSK, but I haven't worked with baseband FSK before. At least that signal should be at a fixed level and it should be easy to make sure it's full scale. Thanks, Scott
FSK - sample rate and bit depth
Started by ●April 6, 2005
Reply by ●April 8, 20052005-04-08
Hi Scott, the information contained in a frequency modulated signal, no matter whether AFSK or FSK, is in the instantanous frequency and not in the amplitude of the signal. That is why hardware FM demodulators us a hard limiting stage, thereby removing every amplitude information. From this point of view one could argue that the number of bits in your ADC does not have a influence at all on the demodulation process. With DSP things are a little different. That comes from the fact that a hard limited signal is for reasons beyond this discussion not well suited for DSP processing. Nonetheless, even in a DSP fm demodulator, there will be a stage which will try to bring the signal to a constant level in order to ease the further fm demodulation. The number of bits in your ADC will limit the dynamic range of input levels for that this "constant levelling stage" can work. With 10 bits you have a dynamic range of app. 60 dB and that should be more than sufficient for any radio transported FM. To give you a clue: The XR2211, a frequency demodulator chip thas has used a lot in analog modems (telephone as well as ham radio) has a dynmaic input range from 10 mV up to 3 V, wich is app. 50 dB and this has always been regarded as being "top". Regards Ulrich "Scott Miller" <scott@3xf.com> schrieb im Newsbeitrag news:115901jlrbb9la1@corp.supernews.com...> I'm working on a couple of demodulators - one for 1200 baud AFSK (and > possibly other bitrates) and one for 9600 baud baseband FSK - and I've got > some questions. > > I'm using an ARM7TDMI chip, so I'm rather CPU constrained. An issue I'm > having trouble with is that the CODEC I'm considering offers sample ratesin> multiples of 8 khz. It seems to me that any of the demodulationtechniques> I'm testing would be easier to implement if the sample rate was an integer > multiple of the baud rate. Is this true, or is there a technique that'snot> as sensitive to this? I don't think I can spare the cycles to sample at a > high rate and decimate to the desired rate. > > Next question - how can I tell how many bits of resolution are going to be > needed to get good decode performance for the 9600 baud demodulator? > Because of the CODEC problems I'm considering switching to the on-board > 10-bit ADC. I know this is more than sufficient for 1200 baud AFSK, but I > haven't worked with baseband FSK before. At least that signal should beat> a fixed level and it should be easy to make sure it's full scale. > > Thanks, > > Scott > >