Hello, Does anyone implement 256pt fixed point FFT on TI's DSP chip? If so, would you please let me know the model, response time and etc? Thanks in advance, Mike
FFT in TI's DSP
Started by ●May 24, 2005
Reply by ●May 24, 20052005-05-24
Mike wrote:> Hello, > > Does anyone implement 256pt fixed point FFT on TI's DSP chip? If so, > would you please let me know the model, response time and etc?Mike, "TI's DSP chip" is about as specific as "GM's motor vehicle". Can you narrow it down? Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
Reply by ●May 24, 20052005-05-24
Reply by ●May 24, 20052005-05-24
A Spartan as a Xilinx DSP--much different than a TI DSP. I suggest you do a bit of background research and then re-phrase your questions. Also, try to include as much detail as possible--the better your question, the better our answer can be. -- Jon Harris SPAM blocked e-mail address in use. Replace the ANIMAL with 7 to reply. "Mike" <mail2mz@gmail.com> wrote in message news:1116947808.644643.52820@z14g2000cwz.googlegroups.com...> Hi Jerry, > > How about Spartan? Actually I am seeking the chip as cheap as possible. > > Thanks, > > Mike >
Reply by ●May 24, 20052005-05-24
Sorry to confuse everyone. Actually I am trying to compare the Pros and Cons for the implemetation of FFT using DSP or FPGA. For DSP, I would like to us TI's chip; For FPGA I would like to use Xilinx's chip. I think both of them are able to complete a 128 pt or 256 pt fix point FFT. What I don't know are the price, speed and any other concern. Thanks, Mike
Reply by ●May 24, 20052005-05-24
"Mike" <mail2mz@gmail.com> wrote in message news:1116948847.214232.269800@g49g2000cwa.googlegroups.com...> Sorry to confuse everyone. Actually I am trying to compare the Pros and > Cons for the implemetation of FFT using DSP or FPGA. For DSP, I would > like to us TI's chip; For FPGA I would like to use Xilinx's chip. I > think both of them are able to complete a 128 pt or 256 pt fix point > FFT. What I don't know are the price, speed and any other concern.Still not good enough in the information dept to be able to provide meaningful answers. What is the input sample rate of the data, what is the max clock speed you are going to be able to run your FPGA and your DSP? It feels like you have a lot more learning to do before our answers can really be of any use to you (even after you provide all the information). If it feels like we are belitttling you, our apologies. Cheers Bhaskar> Thanks, > > Mike >
Reply by ●May 24, 20052005-05-24
Mike wrote:> Sorry to confuse everyone. Actually I am trying to compare the Pros and > Cons for the implemetation of FFT using DSP or FPGA. For DSP, I would > like to us TI's chip; For FPGA I would like to use Xilinx's chip. I > think both of them are able to complete a 128 pt or 256 pt fix point > FFT. What I don't know are the price, speed and any other concern. > > Thanks, > > Mike >An n-point FFT requires something on the order of n*log(n) multiplies and adds. Figure that the TI chip is going to require something on the order of 5-20 clock ticks * n * log_2(n) to get it done (someone will want to refine that figure, which is good because I haven't actually coded an FFT on a DSP). An FPGA will do whatever you design it for, with a _BIG_ tradeoff between speed, logic utilization, and engineering time -- e.g. with a big enough FPGA you could do an n-point FFT in log_2(n) steps, but it'd have to have 2n multipliers to do it. Check the archives of places like Electronic Design News, Electronic Design, possibly look for whitepapers on the TI and Xilinx websites -- there's a lot more information that you need than we can answer here in reasonable length posts. -- ------------------------------------------- Tim Wescott Wescott Design Services http://www.wescottdesign.com
Reply by ●May 24, 20052005-05-24
Bhaskar Thiagarajan wrote:> "Mike" <mail2mz@gmail.com> wrote in message > news:1116948847.214232.269800@g49g2000cwa.googlegroups.com... > >>Sorry to confuse everyone. Actually I am trying to compare the Pros and >>Cons for the implemetation of FFT using DSP or FPGA. For DSP, I would >>like to us TI's chip; For FPGA I would like to use Xilinx's chip. I >>think both of them are able to complete a 128 pt or 256 pt fix point >>FFT. What I don't know are the price, speed and any other concern. > > > Still not good enough in the information dept to be able to provide > meaningful answers. > What is the input sample rate of the data, what is the max clock speed you > are going to be able to run your FPGA and your DSP? > It feels like you have a lot more learning to do before our answers can > really be of any use to you (even after you provide all the information). If > it feels like we are belitttling you, our apologies. > > Cheers > Bhaskar > >To rephrase your question: "I have some cargo to take across the lake. Do I need a rowboat, a powerboat, or a freighter?". To rephrase Baskar's reply: Is your cargo a cup of sugar or 100 shipping containers thereof? Is the lake is 100 yards across or is it Lake Superior? How soon does your cargo need to get across the lake? Do you see our problem here? -- ------------------------------------------- Tim Wescott Wescott Design Services http://www.wescottdesign.com
Reply by ●May 24, 20052005-05-24
Mike wrote:> Sorry to confuse everyone. Actually I am trying to compare the Pros and > Cons for the implemetation of FFT using DSP or FPGA. For DSP, I would > like to us TI's chip; For FPGA I would like to use Xilinx's chip. I > think both of them are able to complete a 128 pt or 256 pt fix point > FFT. What I don't know are the price, speed and any other concern.It is exactly the price and speed you need to know. If the DSP is fast enough, that will most likely be the best solution. If not, then you either need multiple DSP or FPGA. For the FPGA case, either a fairly large one or multiple chips. The FPGA solutions will tend to scale to larger arrays fairly easily, for example a systolic array solution should be possible where a longer array will do longer transforms at a give clock rate. If you don't need one result per clock cycle, you might be able to do some sharing of hardware between different parts of the algorithm. -- glen
Reply by ●May 24, 20052005-05-24
> For FPGA I would like to use Xilinx's chip. hmm ... I hope you are at least talking about Spartan2 (or above - Spartan 2E for example) > What I don't know are the price, speed and any other concern. the chip is cheap (XC2S150E is 22$ at digikey@90pc) but do you have the developement tools and the knowledge? can you live without a multiplication? can you build the interface to you data-source? (unfortunately this is usually more complicated) Price: I think you can get Spartan 2E chips from XC2S50E (few logic) up to XC2S600 (lots of logic elements) ... the price/availability has more fluctuation between vendors than in the family ... (last year we had a factor 2 in price and 18 weeks of waiting difference for a bigger Xilinx FPGA part) Speed: for the FPGA you can have everything ... - you could implement a general purpose CPU and calculate the fft on that (will be really slow - but there are free CPUs and you will soon have results ;-) - you could take the xilinx Core generator and use a ready made fft module (license $$) - there is a fft core on opencores.org ... "a 1024 point 12 bit FFT runs at about 97MHz in a Spartan2e100 -6 device and occupies about 52% of the device." ... but they don't say how long it will take for one block (and I haven't seen a 128 point fft) - you can write your own, fully pipelined parallel fft - you can almost any throughput - the limit is memory bandwidth (and the fact, that the latency is not as easy to be reduced) other concerns: - If you are new to hardware, you need 1/2 year for learning the FPGA developement ... thats more expensive than the chip the DSP is easier for getting it going ... if you need more speed then you need the fpga (and a lot more time) are you actually trying to build something? just a prototype? a real product with > 100k? or is it just a comparison for a paper ..? bye, Michael