I am simulating a software PLL intended to lock to mains, which here is 50Hz. The problem is, as usual, in selecting a good phase detector. For high frequency application the JK/D edge-sensitive digital phase detectors work very well, but for 50Hz the number of edges per second is low, hence the covergence is slow (or with significant ringing). OTOH, the basic multiplying detector is real-time, but produces that nasty second harmonic, which is hard to get rid of in limited memory (it seems all I can afford is an exponential smoothing IIR filter with alpha=0.005 or two of them/a single biquad stage). Are there any tricks particularly well suited for this kind of applications? Best regards, Piotr

# Good phase detectors for low-frequency software PLLs

Piotr Wyderski <peter.pan@neverland.mil> wrote:>I am simulating a software PLL intended to lock to mains, >which here is 50Hz. The problem is, as usual, in selecting >a good phase detector. For high frequency application the >JK/D edge-sensitive digital phase detectors work very well, >but for 50Hz the number of edges per second is low, hence >the covergence is slow (or with significant ringing). OTOH, >the basic multiplying detector is real-time, but produces >that nasty second harmonic, which is hard to get rid of >in limited memory (it seems all I can afford is an exponential >smoothing IIR filter with alpha=0.005 or two of them/a single >biquad stage). > >Are there any tricks particularly well suited for this kind of applications?There are entire textbooks on solar power inverters, which solve this problem. For less critical needs, you can just use zero crossings. Steve

On Sunday, September 24, 2017 at 4:51:03 AM UTC-4, Piotr Wyderski wrote:> I am simulating a software PLL intended to lock to mains, > which here is 50Hz. The problem is, as usual, in selecting > a good phase detector. For high frequency application the > JK/D edge-sensitive digital phase detectors work very well, > but for 50Hz the number of edges per second is low, hence > the covergence is slow (or with significant ringing). OTOH, > the basic multiplying detector is real-time, but produces > that nasty second harmonic, which is hard to get rid of > in limited memory (it seems all I can afford is an exponential > smoothing IIR filter with alpha=0.005 or two of them/a single > biquad stage). > > Are there any tricks particularly well suited for this kind of applications? >the original PLL (on paper) was simply a multiplier and LPF for the phase discriminator. the VCO and input sinusoids would be 90 degrees outa phase. r b-j

On Sun, 24 Sep 2017 10:50:57 +0200, Piotr Wyderski <peter.pan@neverland.mil> wrote:>I am simulating a software PLL intended to lock to mains, >which here is 50Hz. The problem is, as usual, in selecting >a good phase detector. For high frequency application the >JK/D edge-sensitive digital phase detectors work very well, >but for 50Hz the number of edges per second is low, hence >the covergence is slow (or with significant ringing). OTOH, >the basic multiplying detector is real-time, but produces >that nasty second harmonic, which is hard to get rid of >in limited memory (it seems all I can afford is an exponential >smoothing IIR filter with alpha=0.005 or two of them/a single >biquad stage). > >Are there any tricks particularly well suited for this kind of applications? > > Best regards, PiotrA zero-crossing edge-sensitive detector can work very well if there is not much noise in the mains signal. If there is noise then your zero-crossings might be a little distorted by that noise. If you need to get the most phase information in the fastest possible way and still have some noise immunity, I suggest a (simulated) analog convolver with a synthsized cosine and sine signal. That will give you the tangent of the phase angle, from which you can get the angle it self by taking the arctanget. You can run the convolver for one complete cycle of the synthesized frequency and get a phase angle sample once per cycle. And it will be more immune to noise than a zero-crossing detector. Since your main complaint was convergence time, I suggest non-linear feedback. Since this is all simulated in software, it should be easy to "jump" the phase of the syntesized signal instantly as opposed to the old analog method of adjusting the frequency and waiting for the phase to come in. You would only do that for phase errors above a certain threshold. That would be the convergence time. After lock is achieved you can revert to normal feedback to the frequency with appropriate optimal feedback filtering just as you would if you were designing with capacitors and resisotrs. Robert Scott Real-Time Specialties Hopkins, MN