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TMS320C6713BGDP300 does not even trying to boot....

Started by Unknown September 6, 2005
We've got a couple of boards (just developed project) with the subj
processors.
It appears to be fully OK except one thing: the DSP does not even
trying to boot from the on-board flash.
The flash has been burned by the FlashBurn program (that implies using
of JTAG Emulator and, of course, DSP-in-order).
If then I set the core's program counter PC (via CCS) to the address
0x90000000 and run, the program executes from the flash normally. But
on reset there happens nothing, the DSP does not copying the first 1K
to its internal RAM.

Pins HD14, HD12, HD8, HD4, HD3, CLKMODE0 are surely OK..

It seems to me that there are some other pins that affect on the boot
with some undocumented way..
Or, have not you ever heard of defective batches of 6713BGDP300?

There are a few pins that say "Do not oppose on reset" in the data sheet. 
Make sure that you are not opposing them.  Also, there are a few reserved 
pins that have special requirements such as leaving it unconnected, etc. 
Make sure you're doing that as well.

You should check out the EMIF with a scope after doing a reset.  Perhaps the 
DSP is trying to get the data from CE1 but the flash is improperly 
connected.

So if you look at address 0x0 in the memory window and then do Debug->Reset 
you don't see anything change?  I'd check those bootmode pins again and try 
to check them right on the processor at a via if you can.

Brad

<our@inbox.ru> wrote in message 
news:1125987588.349211.134250@g43g2000cwa.googlegroups.com...
> We've got a couple of boards (just developed project) with the subj > processors. > It appears to be fully OK except one thing: the DSP does not even > trying to boot from the on-board flash. > The flash has been burned by the FlashBurn program (that implies using > of JTAG Emulator and, of course, DSP-in-order). > If then I set the core's program counter PC (via CCS) to the address > 0x90000000 and run, the program executes from the flash normally. But > on reset there happens nothing, the DSP does not copying the first 1K > to its internal RAM. > > Pins HD14, HD12, HD8, HD4, HD3, CLKMODE0 are surely OK.. > > It seems to me that there are some other pins that affect on the boot > with some undocumented way.. > Or, have not you ever heard of defective batches of 6713BGDP300? >
Hi Brad,

I doubt if I could fail in such a not complicated affair like pulling
pins up and down :-))

All bootmode pins, "do not oppose" and reserved pins are OK, though I
have checked it only a hundred times so far :-(

Flash and all other EMIF connections are OK as well: flash is readable
and writable as well as SDRAM.

Scope assures that there is no RIGHT activity on the bus at reset: DSP
shuffles only a few tens of addresses, not even asserting CE1, and no
more.

Alex