to address 0x3FFFC0

I=B4d like to enable this section of memory map, seemed that I have to
set this registers:
VMAP=3D1 ,MP/MC'=3D0 , ENPIE=3D0. Where Can I find how to set this registers
or general registers?
TKS.

Your post is EXTREMELY generic and in the future I would suggest that
you provide more information when making your inquiry or asking for
help.  For example, it would be nice to know what processor, or even
what family of processors you are working with.

Based on the information you DID provide, I would venture a guess that
you are working with a Texas Instruments processor as you refer to VMAP
and the MP/MC mode.  I will assume this is the case and attempt to
answer your question.

It is likely that the address you are refering to (0x3fffc0) is a
section of the external interface to the processor, assuming it is a
model that supports the external interface as not all do, that is
either decoded as external access or as the on chip boot rom / sine
tables.  There are two ways that I know of to set which section it
points to.  First, is to use a pull up/down on the MP/MC pin of the
processor.  From what I recall, VMAP=1 is a default setting, but I am
not certain about the ENPIE (Enable for the Peripherial Interrupt
Expansion).  The other method is to set the processor registers.  The
registers are typically accessed by a variable that points to their
location in memory, with the addresses being determined by the linker
and possibly by any power up jumpers or default settings.  It is very
likely that these registers are "protected" and you will need to enable
access to change the values and and disable access to them when you are
done.  The main processor datasheet should have information on the pins
and their operation.  For a document dealing with the registers, I
would consult the product folder.

Oh Sorry, my english is not so good, then I try to be soon to write no
wrongs. But the processor is TMS320F2812 of TI. And I=B4m using the
module: Signal Generator Library to have a sine wave. And there is a
message to use this library : "Note: Edit Linker file, to place the
look-up table in Program memory." And I found  in the datasheet and I
found out that I have to enable the Boot Rom that started in 0x3FFFC0,
but the Standard Math Tables is in the range  0x3F F000. I think that I
can resolve my problems to enable this section of memory, but exactly I
don=B4t know how to enable and the way that my program "understands" to
take the values of sine of look-up table of another section.
TKS.
The impression that I have is that nobody uses the library: sgen.
TKS>Again.

Maikon Adams wrote:
> Oh Sorry, my english is not so good, then I try to be soon to write no
> wrongs.

Nonetheless, your phrase "I try to be soon to write no wrongs" is a very 
clever, if not conventional, use of the language.  I like it a lot.  :-)

Sorry I can't address your technical issue.


Bob
-- 

"Things should be described as simply as possible, but no simpler."

                                              A. Einstein

Thank you for the update, I think I understand what you are driving at
with your inquiry; How to access the sine lookup table embedded in the
boot rom.

On the TMS320F2812, the sine table resides in a range of addresses that
can either be mapped in as zone 7 for the external interface OR can be
mapped to the on chip ROM, which also contains boot code (to initialize
the processor) which is usefull if you are developing a stand alone
application that you wish to run from the on chip flash.

The first step is to make sure this section of memory maps to the ROM
section.  The easiest way to accomplish this is to make sure that the
XMP/MC pin is pulled LOW.  If this is not possible, the XINTCNF2
register can be modified by software after reset.

The second step is the simpler, but often times more confusing part.
Code Composer makes very heavy use of the linker command files.  To
access this section of memory, you need to assign a variable or a
pointer to the table, which is done through the linker command file
(.CMD extension).  You need to define the memory region spanning the
address range of the table and then declare what code sections are to
be allocated in this section.  Second, in your software you need to
designate that the variable that points to (or makes up the sine table
array) goes into this section with a #pragma directive.

Information and examples on how to do this can be found in the sample
projects provided by TI.  You can also look on their C2000 discussion
group where I explain the process in more detail in a reply to a
message titled "2812 - Reads/Writes of External Interface Address/Data
Lines"

okay. I "downloaded" the Boot Rom Reference Guide and I saw that is
default VMAP=3D1 and ENPIE=3D0, and in the hardware the pin is for mode MC.
But, such as you said I=B4m having some problems with a second part. The
.cmd is:
MEMORY
{
PAGE 0 : PROG(R)     : origin =3D 0x3D8000, length =3D 0x020000
PAGE 0 : BOOT(R)     : origin =3D 0x3FF000, length =3D 0x000FC0
PAGE 0 : RESET(R)    : origin =3D 0x3FFFC0, length =3D 0x000002
PAGE 0 : VECS(R)  	 : origin =3D 0x3FFFC2, length =3D 0x3E
PAGE 0 : PIEVECS(R)  : origin =3D 0x000D00, length =3D 0xFF
PAGE 0 : H0RAM(RW)   : origin =3D 0x3F8000, length =3D 0x2000

PAGE 1 : M0RAM(RW)   : origin =3D 0x000000, length =3D 0x000400
PAGE 1 : M1RAM(RW)   : origin =3D 0x000400, length =3D 0x000400
PAGE 1 : L0L1RAM(RW) : origin =3D 0x008000, length =3D 0x2000

}

SECTIONS
{
   /* 22-bit program sections */
   .reset   : > RESET,   PAGE =3D 0
    vectors : > VECS,    PAGE =3D 0
   .pinit   : > H0RAM,   PAGE =3D 0
   .cinit   : > H0RAM,   PAGE =3D 0
   .text    : > H0RAM,   PAGE =3D 0
   SINTBL	: > H0RAM,   PAGE =3D	0

   /* 16-Bit data sections */
   .const   : > L0L1RAM, PAGE =3D 1
   .bss     : > L0L1RAM, PAGE =3D 1
   .stack   : > M1RAM, 	 PAGE =3D 1
   .sysmem  : > M0RAM, 	 PAGE =3D 1

   DLOG	 	: >	L0L1RAM	 PAGE =3D	1

   /* 32-bit data sections */
   .ebss    : > L0L1RAM, PAGE =3D 1
   .econst  : > L0L1RAM, PAGE =3D 1
   .esysmem : > L0L1RAM, PAGE =3D 1
}

then, how you can see, already there is the variable SINTBL, until
where I understood I have to make a bridge throught of #pragma
directive to link the table lookup with my software ?
Note: the problem is the space of memory 0x3F FFC0 in the .reset . But
I still believe that there is a region of memory that isn=B4t enable,
because Code Composer gives the follow message:

Loader: One or more sections of your program falls into a memory region
that is not writable.  These regions will not actually be written to
the target.  Check your linker configuration and/or memory map.

Could you indicate me the place to take the examples that you cited ?
TKS.

The example that shows how to setup the .cmd files and possible ways to
access the sine table is provided on TI's webpage.  The document you
are probably most interested in at this time is SPRC087.  If this is
the entirety of your linker command file, I would suspect that it was
hand written based upon your understanding of the memory map.  If this
is the case, I believe that you have a number of omissions from the
memory defition that will impair your ability to work with the
processor.  For information on a better method, consult their document
on the peripheral header examples.


I suspect your problem with the Loader message is that you likely have
something defined as being loaded into the bootrom section.  The
example below shows how to avoid this. Also, part of your problem is
that you are defining the SINTBL to be in the H0SARAM, when in fact it
is already located at the start of the bootrom.  What you need to do is
decare a section  in this bootrom, and then declare a variable in your
code to be located in that section with a #pragma directive.

For your reference I am also providing the relevant portions of my code
below.:
//Found in SPRC087

//In your program put:
#pragma DATA_SECTION(sine_table, "IQmathTables")
long sine_table[512];

//In your linker .cmd file put
MEMORY
{

   BOOTROM (RW) : origin = 0x3ff000, length = 0x000fc0  //I believe you
already have this

}


SECTIONS
{

		sinetab			  : > BOOTROM		 PAGE = 0

      /*==========================================================*/
      /* Tables for IQ math functions:                            */
      /*==========================================================*/
      /* For K1 device (no tables in boot ROM), use this:         */
      /* IQmathTables  : load = BOOTROM, PAGE = 0                 */
      /* For F2810/12 devices (with tables in Boot ROM) use this: */

      IQmathTables  : load = BOOTROM, type = NOLOAD, PAGE = 0

      /*==========================================================*/
      /* IQ math functions:                                       */
      /*==========================================================*/
      IQmath        : load = PRAMH0,   PAGE = 0

}

I started studing the module SPRC087. But, I=B4d like to remember that
the file .cmd that I copied and showed here is a file of signal
generator library for Texas. And to use or to run the code I had to
exclude a file that I didn=B4t get to find, stb.lib. The code .c is:
#include <sgen.h>

SGENT_3 sgen =3D SGENT_3_DEFAULTS;

int x1, x2, x3;

main ( )
{
	sgen.offset=3D0;
	sgen.gain=3D0x7fff; /* gain =3D 1 in Q15 */
	sgen.freq=3D5369; /* freq =3D (Required Freq/Max Freq)*2^15 */
	/* =3D (50/305.17)*2^15 =3D5369  */
	sgen.step_max=3D1000; /* Max Freq=3D (step_max * sampling freq)/65536 */
	/* Max Freq =3D (1000*20k)/65536 =3D 305.17 */
//	sgen.phase=3D0x4000; /* Phase =3D (required Phase)/180 in Q15 */
	/* =3D (+90/180) in Q15 =3D 4000h */
}

void interrupt isr_20khz()
{
	sgen.calc(&sgen);
	x1=3Dsgen.out1;
	x2=3Dsgen.out2;
	x3=3Dsgen.out3;
}

a simple code, like is write in the module.

I found the library stb.lib. But, I still have a problem with the
region 0x3FFFC0 , the message is:

"Loader: One or more sections of your program falls into a memory
region that is not writable.  These regions will not actually be
written to the target.  Check your linker configuration and/or memory."

And second, when I watch for x1, for example, I saw only garbage of
memory, probably is cos I didn=B4t do what is wrote in the note of
module:  "Edit linker Command file, to place the look-up table in
Program Memory."

It must have some relationship with the answer yours (item 7).

Thanks.

The way that it looked to me, your linker file was set up to do two
things that I think aren't necessary.

1 - you appear to be attempting to copy the sine table from the bootrom
to a different segment of memory.  Why not simply use it where it is.
If your timing paramaters are that tight that you need to have the
lookup table in RAM, then you probably need to re-evaluate your
algorithm.

2 - I also suspect that your linker file or some other aspect is
configured so that it is attempting to load into an area of the
processor that is not loadable, such as the bootrom region.  Check your
.map file and see if anything is going to such an area.

If these suggestions don't work, try contact TI tech support and or
posting on the TI discussion forum, where the viewers will have more
experience specifically with TI.