Good day to one and all! Does anyone know of any freeware that essentially dumps out the vhdl code of digital filters? Particurlarly IIR filters. Basically, I imagine it will prompt you for the tap values and filter order and .... You get the idea. -Roger
Freeware request
Started by ●March 17, 2006
Reply by ●March 17, 20062006-03-17
"Roger Bourne" <rover8898@hotmail.com> wrote in message news:1142612440.477494.188770@j33g2000cwa.googlegroups.com...> Good day to one and all! > > Does anyone know of any freeware that essentially dumps out the vhdl > code of digital filters? > Particurlarly IIR filters. > Basically, I imagine it will prompt you for the tap values and filter > order and .... > You get the idea. > > -RogerIf you understood enough about designing filters, vhdl and FPGAs you'd know why you'll never find what you are asking for. I suspect you don't (and maybe that's why you were inclined to ask for this)...so here are a few comments that my help improve that situation. - Matlab/Simulink (not freeware) attempts to do something like this. It still doesn't come close to what you want and it doesn't spit out vhdl - I think it creates netlists for a set of devices from a couple of FPGA manufacturers. - There are quite a few options for implementing digital filters on FPGAs (or similar HW) that depend a lot on the target FPGA and it's architecture. So any tool that exists would have to be fairly specific for one set of FPGAs. Even at this level, I'd suspect a tool of this nature would give you functional but fairly unoptimized code at best. One reason, you'd consider using FPGAs for digital filters is performance - so this might be against the whole reason you're interested in this Hope this helps Cheers Bhaskar
Reply by ●March 17, 20062006-03-17
Hello Bhaskar, Thanks for the info. Actually, couple years back, I did toy with a few FPGAs. Never did push them to their max, though. I was working at low MHz frequencies and design size was definetily not an issue. However I never played with digital filters. One question leaps in my head though, and I have to ask it even though I dread the answer: If the digital filter is decided upon (known order, coefficients...), how many different architectures can there be into implementing it? Assuming that you are working at a manageable frequency (that does not require additional latency cycles)... Actually it is coming back to me as I am typing this post; if I remember correclty, the algorithms and instructions used in your code will either shrink or enlarge the equivalent schematic of the implemented vhdl digital filter. Rigth? -Roger
Reply by ●March 17, 20062006-03-17
Roger Bourne wrote:> Good day to one and all! > > Does anyone know of any freeware that essentially dumps out the vhdl > code of digital filters? > Particurlarly IIR filters. > Basically, I imagine it will prompt you for the tap values and filter > order and .... > You get the idea. > > -RogerNot quite what you're looking for, but you can get free IP cores from opencores.org, including one that does a biquad IIR. You can chain biquads together to make larger filters, of course, and all you need to supply are the filter coefficients (of course precision, scaling, and so forth will be a concern). Cheers! --M
Reply by ●March 17, 20062006-03-17
Roger Bourne wrote:> Hello Bhaskar, > > Thanks for the info. > Actually, couple years back, I did toy with a few FPGAs. Never did push > them to their max, though. I was working at low MHz frequencies and > design size was definetily not an issue. > > However I never played with digital filters. One question leaps in my > head though, and I have to ask it even though I dread the answer: > > If the digital filter is decided upon (known order, coefficients...), > how many different architectures can there be into implementing it? > Assuming that you are working at a manageable frequency (that does not > require additional latency cycles)... > > Actually it is coming back to me as I am typing this post; if I > remember correclty, the algorithms and instructions used in your code > will either shrink or enlarge the equivalent schematic of the > implemented vhdl digital filter. Rigth? > > -Roger >Assume that you're restricting yourself to a single-input, single-output 2nd-order filter (this is a good assumption -- you want to break your filters down into 1st- and 2nd-order blocks to maintain numerical stability). Now consider the state space representation of the filter: x_n = A x_{n-1} + B u_n, y_n = C x_{n-1} + D u_n If you're talking block diagrams, the 'architecture' of the filter is defined by the values of the entries in the gain matrices. The number of variations you can choose for any given transfer function is infinite -- and there are many direct-form filters that use redundant states to gain numerical stability, so a filter who's effect is 2nd-order will actually be 4th-order. And yes, the form of the filter you use will have a profound impact on the schematic you must use to implement it, and the numerical stability of the result. I suspect that one could write a small book, or at least a large chapter, on how best to implement a simple 2nd-order digital filter. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Posting from Google? See http://cfaj.freeshell.org/google/
Reply by ●March 17, 20062006-03-17
"Roger Bourne" <rover8898@hotmail.com> wrote in message news:1142624958.897468.72270@v46g2000cwv.googlegroups.com...> Hello Bhaskar, > > Thanks for the info. > Actually, couple years back, I did toy with a few FPGAs. Never did push > them to their max, though. I was working at low MHz frequencies and > design size was definetily not an issue. > > However I never played with digital filters. One question leaps in my > head though, and I have to ask it even though I dread the answer: > > If the digital filter is decided upon (known order, coefficients...), > how many different architectures can there be into implementing it? > Assuming that you are working at a manageable frequency (that does not > require additional latency cycles)...Even if you restricted yourself to FIR filters (they tend to be a little simpler in the digital domain for various reasons), there are atleast a handful of ways you can implement them in SW (given a certain processor). Once you open up the HW side of things, your options can increase quite a bit depending on your FPGA's architecture. Are you familiar with serial distributed arithmetic? If not, look it up on Google. Once you enter the IIR world, things just get even more complicated - like Tim said, a small book's worth (and that's probably not even considering the FPGA architectural options). You can try the IP cores (I guess there are free ones available based on another response to your thread) but I don't think cores spit out vhdl. Cheers Bhaskar> Actually it is coming back to me as I am typing this post; if I > remember correclty, the algorithms and instructions used in your code > will either shrink or enlarge the equivalent schematic of the > implemented vhdl digital filter. Rigth? > > -Roger >
Reply by ●March 20, 20062006-03-20
hi roger, www.winfilter.20m.com is a freeware which generate vhdl code, but fir only. regards, Adrian Roger Bourne wrote:> Good day to one and all! > > Does anyone know of any freeware that essentially dumps out the vhdl > code of digital filters? > Particurlarly IIR filters. > Basically, I imagine it will prompt you for the tap values and filter > order and .... > You get the idea. > > -Roger
Reply by ●March 20, 20062006-03-20
adrian wrote:> hi roger, > > www.winfilter.20m.com is a freeware which generate vhdl code, but fir > only. >You ignored what may be its most valuable feature. It *plots everything* !!!!! OK, perhaps not "kitchen sink" ;) So I'm a visually oriented newbie. I think this tool should rate up there with the Java code illustrating Fourier Transforms. BTW would someone provide me with link to that site. I've had a system crash and lost many links. SO WHAT if I advise others to do backups. should I follow my own advice? --snicker snicker--- Thank you to Adrian Kundert.
Reply by ●March 20, 20062006-03-20
On Mon, 20 Mar 2006 09:19:10 -0600, Richard Owlett <rowlett@atlascomm.net> wrote:>adrian wrote: > >> hi roger, >> >> www.winfilter.20m.com is a freeware which generate vhdl code, but fir >> only. >> > > >You ignored what may be its most valuable feature. >It *plots everything* !!!!! >OK, perhaps not "kitchen sink" ;) > >So I'm a visually oriented newbie. >I think this tool should rate up there with the Java code illustrating >Fourier Transforms. > >BTW would someone provide me with link to that site. I've had a system >crash and lost many links. > >SO WHAT if I advise others to do backups. >should I follow my own advice? --snicker snicker--- > >Thank you to Adrian Kundert.I'm curious about why he implements a raised cosine filter. What are they used for? ROOT raised cosine, yes, but straight raised cosine? Allan
Reply by ●March 20, 20062006-03-20
Allan Herriman wrote:> On Mon, 20 Mar 2006 09:19:10 -0600, Richard Owlett > <rowlett@atlascomm.net> wrote: > > >>adrian wrote: >> >> >>>hi roger, >>> >>>www.winfilter.20m.com is a freeware which generate vhdl code, but fir >>>only. >>> >> >> >>You ignored what may be its most valuable feature. >>It *plots everything* !!!!! >>OK, perhaps not "kitchen sink" ;) >> >>So I'm a visually oriented newbie. >>I think this tool should rate up there with the Java code illustrating >>Fourier Transforms. >> >>BTW would someone provide me with link to that site. I've had a system >>crash and lost many links. >> >>SO WHAT if I advise others to do backups. >>should I follow my own advice? --snicker snicker--- >> >>Thank you to Adrian Kundert. > > > I'm curious about why he implements a raised cosine filter. What are > they used for? ROOT raised cosine, yes, but straight raised cosine? > > AllanUsually, one RRC filter is used at the transmitter to control splatter and another at the receiver as a matched filter to maximize SNR. Together, they have a raised cosine (RRC^2) response to suppress ISI. (You know all this, Allan, but I'm having fun with the acronyms.) A raised cosine filter allows one see what the signal will look like with an ideal transmission path. Maybe you can think of another use? Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
