# Inconsistancy in Cycle count in VDSP ++ 3.5

Started by March 28, 2006
```Hi All,
I would highly appreciate if any one can answer my query.

I have written a small program in C to check the cycle consumption for
different operations in Blackfin (BF535)
I am using the demo version of Visual DSP++ 3.5 simulator for this
purpose.
The code which I have written is as follows...

void main(void)
{
long int a,b,i1,i2,i3,i5,i6;
a=4;
b=2;
i1 = a+b;
i2 = a*b;
i3 = a-b;
i5 = a>>1;
i6 = b<<1;
}
As the aim of this program is just to check the cycle count I have kept
it as simple as possible.
Now blackfin DSPs are said to have ability to perform all these
operations in single cycle. But the cycle count that I got seems to be
totally different.
For the addition it took 25 cycles, for subtraction it took 9 cycles,
for multiplication it again took 25 cycles. For shifting it took 16
cycles each.
(I found these cycles by putting breakpoint after each operation and
looking at the cycles count each time)
I also saw the assembly code for the program generated by the simulator
which looks something like this.

R3 = 4 ;
[ FP + -100 ] = R3 ;
R2 = 2 ;
[ FP + -96 ] = R2 ;
W [ FP + -32 ] = R3 ;
W [ FP + -28 ] = R2 ;
R1 = 4 ;
[ FP + -68 ] = R1 ;
R0 = 6 ;
[ FP + -36 ] = R0 ;
R7 = 20 ;
[ FP + -64 ] = R7 ;
R6.L = 26214 ;
R6.H = 16518 ;
[ FP + -124 ] = R6 ;
R2.L = -13107 ;
R2.H = 16396 ;
[ FP + -120 ] = R2 ;
R3 = [ FP + -100 ] ;
R5 = [ FP + -96 ] ;
R4 = R3 + R5 ;
[ FP + -92 ] = R4 ;
R3 *= R5 ;
[ FP + -88 ] = R3 ;
R7 = [ FP + -100 ] ;
R1 = R7 - R5 ;
[ FP + -84 ] = R1 ;
R3 = [ FP + -100 ] ;
R3 >>>= 0x1 ;
[ FP + -76 ] = R3 ;
R2 = [ FP + -96 ] ;
R2 <<= 0x1 ;
[ FP + -72 ] = R2 ;

Kindly tell me if I am doing any mistake and if the cycle count which I
got is the minimum or it can be reduced by anyway.

Any help is highly appreciated.

Thanks in advance. and Sorry for such a long mail.

DP

```