"John" <john@jnho.hnjo.invalid.com> wrote in message news:e20kho$2rbq$1@newsbin.cybercity.dk...> > > > The basic SHARC instruction manual is the ADSP-21160 Instruction Set > > Reference. It should have been renamed when the newer processors came > > out. > > > > > > http://www.analog.com/processors/epManualsDisplay/0,2795,,00.html? > > SectionWeblawId=433&ContentID=95537&Language=English > > Hi again... > > The syntax of some of the instructions looks pretty weird. Sorry for > asking a stupid question, but is that actually how you write the > instruction? > If not, how do I interpret the syntax? What are those vertical bars? > > I read the beginning of the document and there is a little tiny section > regarding > syntax and conventions..There is actually a programming manual for the 2136x series which you should be using. You can find the manual here http://tinyurl.com/17a The hardware reference is here http://tinyurl.com/ryhlx This tells you about all the peripherals and architecture of the chip. Regarding the syntax, the interpretation can be hard if you jump into it with no background on the chip's architecture/capabilities. No - you don't write the instruction as seen in the generic syntax (there are plenty of examples in the manual that shows you how you'd write em in a program). Those vertical bars show you optional sections of an instruction. For example, the Sharc can do 1 compute, 1 DM memory move and 1 PM memory move. So compute |, DM(Ia,Mb) = dreg1 ||, PM(Ic,Md) = dreg2 |; gives you about 3 different options for say an add instruction r5 = r6 + r0; or r5 = r6 + r0, dm(i0,m3)=r4; or r5 = r6 + r0, dm(i0,m3), pm(i11,m15)=r3; I just found the perfect section that would help you interpret the manual better. Search for the 'Instruction Set Notation Summary' - gives you all you need to get started. Cheers Bhaskar
Question about algorithm-to-architecture mapping
Started by ●April 16, 2006
Reply by ●April 17, 20062006-04-17
Reply by ●April 17, 20062006-04-17
"John" <john@jnho.hnjo.invalid.com> wrote in news:e20jm0$2qqo$1@newsbin.cybercity.dk:>> The basic SHARC instruction manual is the ADSP-21160 Instruction Set >> Reference. It should have been renamed when the newer processors came >> out. >> > > Thank you very much. Is this reference complete/accurate in the sense > that it was > written for ADSP-21160 but I am going to use it for ADSP-21364 ? > > >The 21364 uses the same instructions (as do all SIMD SHARCS, 2116x, 2126x, 2136x). I don't think there are any new instructions since the 2116x. The differences are going to be with I/O registers. These registers are discussed in the various user manuals. -- Al Clark Danville Signal Processing, Inc. -------------------------------------------------------------------- Purveyors of Fine DSP Hardware and other Cool Stuff Available at http://www.danvillesignal.com
Reply by ●April 17, 20062006-04-17
"John" <john@jnho.hnjo.invalid.com> wrote in news:e20kho$2rbq$1 @newsbin.cybercity.dk:>> >> The basic SHARC instruction manual is the ADSP-21160 Instruction Set >> Reference. It should have been renamed when the newer processors came >> out. >> >> >> http://www.analog.com/processors/epManualsDisplay/0,2795,,00.html? >> SectionWeblawId=433&ContentID=95537&Language=English > > Hi again... > > The syntax of some of the instructions looks pretty weird. Sorry for > asking a stupid question, but is that actually how you write the > instruction? > If not, how do I interpret the syntax? What are those vertical bars? > > I read the beginning of the document and there is a little tiny section > regarding > syntax and conventions.. > > > >I think the syntax is very easy although the instruction manual may not be as clear or as well organized as it could be. I think the best way to get a handle on SHARC code is probably by looking at examples. There is a 21xxx book (which predates the SHARC) that has lots of examples. You can find it on the ADI web site. It's called ADSP- 21000 Applications Handbook http://www.analog.com/processors/processors/sharc/technicalLibrary/codeEx amples/applicationsHandbook.html Our dsp boards come with example programs that are written in assembly. We have 21364 boards. -- Al Clark Danville Signal Processing, Inc. -------------------------------------------------------------------- Purveyors of Fine DSP Hardware and other Cool Stuff Available at http://www.danvillesignal.com
Reply by ●April 17, 20062006-04-17
John wrote:>>VisualDSP is such a tool. It does all you want for all the DSPs in the >>Analog Devices product range. >> > > > The statistical profiler is more or less useless in my opinion. It tells you > how much time is spent in various code sections. Nice info to get started > with but I could figure that out myself by timing code sections myself.Cut-and-paste in a word processor is similarly useless. You can delete and type instead.> The only thing > I see coming close to what I want is that I am able to see the assembly > code of the compiled C-function. But then again....I can see each > instruction in > a window in VisualDSP, but the manuals I have looked in does not tell > me what exactly happens on an architectural level when a particular > instruction is executed. And that's what I want to know....The individual hardware/architecture manuals for the processors will tell you that.> board I am using. Usually you would find a reference guide for > the instruction set. But I haven't been able to locate a simple > thing like that....Anybody got a clue where I can find that?Manufacturer's web site?> Back in the simple 80s when I was doing assembly coding > on a Commodore 64 I had a reference guide where I could look up > instructions and see how many cycles an instruction took to > execute thus enabling me to tweak my code.Those facilities exist for the few DSP chips I've used.> I hope this clarifies my problem....sorry if I didn't express > my problem clearly enough :o)Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
Reply by ●April 17, 20062006-04-17
Al Clark wrote: ...> We have 21364 boards.Wow! Where do you store them all? :-) Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
Reply by ●April 17, 20062006-04-17
Jerry Avins <jya@ieee.org> wrote in news:PJudnUqy2L27aN7ZRVn-vQ@rcn.net:> Al Clark wrote: > > ... > >> We have 21364 boards. > > Wow! Where do you store them all? :-)If only we could sell them all......> > Jerry-- Al Clark Danville Signal Processing, Inc. -------------------------------------------------------------------- Purveyors of Fine DSP Hardware and other Cool Stuff Available at http://www.danvillesignal.com
Reply by ●April 17, 20062006-04-17
Reply by ●April 21, 20062006-04-21
Although it doesn't help you with the ADI part, a tool that does what you want is the combination of 'tree code' with graphic analysis in the Philips TriMedia compiler, and schedule reports. The compiler generates a representation of the program that is mapped onto the avaialble instruction set: this is called 'tree code' and shows also the dependencies between operations, and any latencies that must be respected. The compiler (scheduler actually) can also emit a graph showing this which shows at a glance a lot of information about the program and its mapping onto the architecture. The next step is that the compiler/scheduler implements the represented code on the CPU and generates a text report called a 'schedule report'. This shows you which unit are used, when and where. It also gives statistics: for instance how many instructions would it take to implement this program on a machine wiht this instruction set but no restrictions on the use of hardware units - this can be compared with the actual result of implementation and tells you if you are limited by architecture (by which I mean instruction set) or implementation (by which I mean the particular choices of restrictions and latencies for those instructions, number and allocation of hardware units). Going further, you can generate profiles that tell you quite quickly whether you are limited by parallelism, memory accesses or mismatch to instruction set. Sadly these tools are part of the specific TriMedia tool chain but I have used them to analyse general code because they are rather good at that. The TriMedia tools are quite flexible as they target many different implementation using different allocations and types of functional units, so they supply (and need) this kind of analysis. Chris ===================== Chris Bore www.bores.com
Reply by ●April 21, 20062006-04-21
"Chris Bore" <chris.bore@gmail.com> skrev i en meddelelse news:1145652456.362799.179260@i40g2000cwc.googlegroups.com...> Although it doesn't help you with the ADI part, a tool that does what > you want is the combination of 'tree code' with graphic analysis in theThank you very much...Exactly what I have been looking for...
Reply by ●April 17, 20072007-04-17
John wrote:>> The basic SHARC instruction manual is the ADSP-21160 Instruction Set >> Reference. It should have been renamed when the newer processors came >> out. >> >> >> http://www.analog.com/processors/epManualsDisplay/0,2795,,00.html? >> SectionWeblawId=433&ContentID=95537&Language=English > > Hi again... > > The syntax of some of the instructions looks pretty weird. Sorry for > asking a stupid question, but is that actually how you write the > instruction? > If not, how do I interpret the syntax? What are those vertical bars? > > I read the beginning of the document and there is a little tiny section > regarding syntax and conventions..Didn't it describe the bars there? Don't the bars indicate parallel execution? Jerry -- Engineering is the art of making what you want from things you can get. ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯
