Forums

Open drain output to serial port input (ADSP-218x)

Started by Unknown April 17, 2006
Hello,

I want to know if it is licit to connect an open drain output from
some device (W682510 voice codec by Winbond) to the RXD0 pin on
serial port 0 of an ADSP-2181, and in affirmative case, which value
to use for the pullup resistor.

At the beginning I thought it was OK, but have not been able to make
it work. DSP to codec is OK, I am generating a sinusoid from a table
in the DSP, via u-law companding, to the codec. I can see the sine
wave with an o'scope on the codec's analog output.

However, if I feed the codec's analog input with a sinewave, I just
get 0xE0A1 (-8031) in the DSPs memory. If I attach an o'scope probe
to the PCMT1 pin of the codec (digital serial output, u-law
companded), which is attached to the RXD0 pin of the DSP, pulled up
with a resistor (I have tried 1k, 10k, 33k), I can see the signal
pattern changing, but still get the same value: 0xE0A1.

If I set the analog input to 0V I can see the digital pattern
11111111 or 01111111, which correspond to +Zero and -Zero signal and
is OK, but I still get the value in the DSP: 0xE0A1

But if I remove the pullup and perform a digital loopback connecting
the TXD0 (sinewave, 8 bit uLaw companded) pin to the RXD0 pin, now I
get the correct values in the DSP memory, the same ones as on the
transmit buffer, and plotting I see the sinewave.

All of your suggestions are very welcome.

JaaC

Jaime Andr�s Aranguren Cardona wrote:

> Hello, > > I want to know if it is licit to connect an open drain output from > some device (W682510 voice codec by Winbond) to the RXD0 pin on > serial port 0 of an ADSP-2181, and in affirmative case, which value > to use for the pullup resistor. > > At the beginning I thought it was OK, but have not been able to make > it work. DSP to codec is OK, I am generating a sinusoid from a table > in the DSP, via u-law companding, to the codec. I can see the sine > wave with an o'scope on the codec's analog output. > > However, if I feed the codec's analog input with a sinewave, I just > get 0xE0A1 (-8031) in the DSPs memory. If I attach an o'scope probe > to the PCMT1 pin of the codec (digital serial output, u-law > companded), which is attached to the RXD0 pin of the DSP, pulled up > with a resistor (I have tried 1k, 10k, 33k), I can see the signal > pattern changing, but still get the same value: 0xE0A1. > > If I set the analog input to 0V I can see the digital pattern > 11111111 or 01111111, which correspond to +Zero and -Zero signal and > is OK, but I still get the value in the DSP: 0xE0A1 > > But if I remove the pullup and perform a digital loopback connecting > the TXD0 (sinewave, 8 bit uLaw companded) pin to the RXD0 pin, now I > get the correct values in the DSP memory, the same ones as on the > transmit buffer, and plotting I see the sinewave. > > All of your suggestions are very welcome. > > JaaC >
When you say 'digital loopback' do you mean that you're setting a bit in the processor to loop back internally, or do you mean you're putting a little green wire on the board? I suspect that the receive side is somehow deciding that it's getting all zeros, and the mu-law expander is giving you 0xE0A1. If your all-ones pattern is going all the way up to VCC, then I would suspect that there is some internal setup that isn't getting done right in the chip, or that you're not actually connected to the pin externally -- i.e. could your trace be connected, but not the pin? -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Posting from Google? See http://cfaj.freeshell.org/google/
Tim Wescott wrote:
> Jaime Andr=E9s Aranguren Cardona wrote: > > > Hello, > > > > I want to know if it is licit to connect an open drain output from > > some device (W682510 voice codec by Winbond) to the RXD0 pin on > > serial port 0 of an ADSP-2181, and in affirmative case, which value > > to use for the pullup resistor. > > > > At the beginning I thought it was OK, but have not been able to make > > it work. DSP to codec is OK, I am generating a sinusoid from a table > > in the DSP, via u-law companding, to the codec. I can see the sine > > wave with an o'scope on the codec's analog output. > > > > However, if I feed the codec's analog input with a sinewave, I just > > get 0xE0A1 (-8031) in the DSPs memory. If I attach an o'scope probe > > to the PCMT1 pin of the codec (digital serial output, u-law > > companded), which is attached to the RXD0 pin of the DSP, pulled up > > with a resistor (I have tried 1k, 10k, 33k), I can see the signal > > pattern changing, but still get the same value: 0xE0A1. > > > > If I set the analog input to 0V I can see the digital pattern > > 11111111 or 01111111, which correspond to +Zero and -Zero signal and > > is OK, but I still get the value in the DSP: 0xE0A1 > > > > But if I remove the pullup and perform a digital loopback connecting > > the TXD0 (sinewave, 8 bit uLaw companded) pin to the RXD0 pin, now I > > get the correct values in the DSP memory, the same ones as on the > > transmit buffer, and plotting I see the sinewave. > > > > All of your suggestions are very welcome. > > > > JaaC > > > When you say 'digital loopback' do you mean that you're setting a bit in > the processor to loop back internally, or do you mean you're putting a > little green wire on the board? > > I suspect that the receive side is somehow deciding that it's getting > all zeros, and the mu-law expander is giving you 0xE0A1. If your > all-ones pattern is going all the way up to VCC, then I would suspect > that there is some internal setup that isn't getting done right in the > chip, or that you're not actually connected to the pin externally -- > i.e. could your trace be connected, but not the pin? > > -- > > Tim Wescott > Wescott Design Services > http://www.wescottdesign.com
Hi Tim, First, thanks for the reply. By "digital loopback" I mean the actual connection of the physical TXD0 pin on the DSP to the RXD0 pin on the DSP (serial port 0 transmit and receive pins). What I can conclude is that the receiverr side is working OK. I certainly don't understand when you say "If your all-ones pattern is going all the way up to VCC, then I would suspect that there is some internal setup that isn't getting done right in the chip". Instead, I'd thought that the all-ones pattern should go up to VCC, in order for the DSP RXD0 pin to "see" the correct values of all-ones. Any further suggestion/comment is VERY welcome. Regards, JaaC
Jaime Andr�s Aranguren Cardona wrote:

> Tim Wescott wrote: > >>Jaime Andr�s Aranguren Cardona wrote: >> >> >>>Hello, >>> >>>I want to know if it is licit to connect an open drain output from >>>some device (W682510 voice codec by Winbond) to the RXD0 pin on >>>serial port 0 of an ADSP-2181, and in affirmative case, which value >>>to use for the pullup resistor. >>> >>>At the beginning I thought it was OK, but have not been able to make >>>it work. DSP to codec is OK, I am generating a sinusoid from a table >>>in the DSP, via u-law companding, to the codec. I can see the sine >>>wave with an o'scope on the codec's analog output. >>> >>>However, if I feed the codec's analog input with a sinewave, I just >>>get 0xE0A1 (-8031) in the DSPs memory. If I attach an o'scope probe >>>to the PCMT1 pin of the codec (digital serial output, u-law >>>companded), which is attached to the RXD0 pin of the DSP, pulled up >>>with a resistor (I have tried 1k, 10k, 33k), I can see the signal >>>pattern changing, but still get the same value: 0xE0A1. >>> >>>If I set the analog input to 0V I can see the digital pattern >>>11111111 or 01111111, which correspond to +Zero and -Zero signal and >>>is OK, but I still get the value in the DSP: 0xE0A1 >>> >>>But if I remove the pullup and perform a digital loopback connecting >>>the TXD0 (sinewave, 8 bit uLaw companded) pin to the RXD0 pin, now I >>>get the correct values in the DSP memory, the same ones as on the >>>transmit buffer, and plotting I see the sinewave. >>> >>>All of your suggestions are very welcome. >>> >>>JaaC >>> >> >>When you say 'digital loopback' do you mean that you're setting a bit in >>the processor to loop back internally, or do you mean you're putting a >>little green wire on the board? >> >>I suspect that the receive side is somehow deciding that it's getting >>all zeros, and the mu-law expander is giving you 0xE0A1. If your >>all-ones pattern is going all the way up to VCC, then I would suspect >>that there is some internal setup that isn't getting done right in the >>chip, or that you're not actually connected to the pin externally -- >>i.e. could your trace be connected, but not the pin? >> >>-- >> >>Tim Wescott >>Wescott Design Services >>http://www.wescottdesign.com > > > Hi Tim, > > First, thanks for the reply. > > By "digital loopback" I mean the actual connection of the physical TXD0 > pin on the DSP to the RXD0 pin on the DSP (serial port 0 transmit and > receive pins). What I can conclude is that the receiverr side is > working OK. > > I certainly don't understand when you say "If your all-ones pattern is > going all the way up to VCC, then I would suspect that there is some > internal setup that isn't getting done right in the chip". Instead, I'd > thought that the all-ones pattern should go up to VCC, in order for the > DSP RXD0 pin to "see" the correct values of all-ones. > > Any further suggestion/comment is VERY welcome. > > Regards, > > JaaC >
By the VCC comment I meant that if the input from the CODEC is going all the way up to VCC then the chip should be reading it correctly, _unless_ the chip isn't set up right. Since your loopback is physical, and works right, that seems to indicate that it's not a setup problem, or at least not _that_ setup problem. Did you look at the bit timing, and the frame timing? The bits out of the codec should be lined up with the bits out of the TXD0 -- if they're not then you could have perfect data at the wrong time and get the results you're seeing. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Posting from Google? See http://cfaj.freeshell.org/google/
> > Hi Tim, > > > > First, thanks for the reply. > > > > By "digital loopback" I mean the actual connection of the physical TXD0 > > pin on the DSP to the RXD0 pin on the DSP (serial port 0 transmit and > > receive pins). What I can conclude is that the receiverr side is > > working OK. > > > > I certainly don't understand when you say "If your all-ones pattern is > > going all the way up to VCC, then I would suspect that there is some > > internal setup that isn't getting done right in the chip". Instead, I'd > > thought that the all-ones pattern should go up to VCC, in order for the > > DSP RXD0 pin to "see" the correct values of all-ones. > > > > Any further suggestion/comment is VERY welcome. > > > > Regards, > > > > JaaC > > > By the VCC comment I meant that if the input from the CODEC is going all > the way up to VCC then the chip should be reading it correctly, _unless_ > the chip isn't set up right. > > Since your loopback is physical, and works right, that seems to indicate > that it's not a setup problem, or at least not _that_ setup problem. > > Did you look at the bit timing, and the frame timing? The bits out of > the codec should be lined up with the bits out of the TXD0 -- if they're > not then you could have perfect data at the wrong time and get the > results you're seeing. > > -- > > Tim Wescott > Wescott Design Services > http://www.wescottdesign.com >
Hi Tim, Bit timing seems to be OK (I'll double check this) Do you think that buffering the pulled up signal with extenal logic (double inverters or small CPLD) could help? Thanks
> > Hi Tim, > > > > First, thanks for the reply. > > > > By "digital loopback" I mean the actual connection of the physical TXD0 > > pin on the DSP to the RXD0 pin on the DSP (serial port 0 transmit and > > receive pins). What I can conclude is that the receiverr side is > > working OK. > > > > I certainly don't understand when you say "If your all-ones pattern is > > going all the way up to VCC, then I would suspect that there is some > > internal setup that isn't getting done right in the chip". Instead, I'd > > thought that the all-ones pattern should go up to VCC, in order for the > > DSP RXD0 pin to "see" the correct values of all-ones. > > > > Any further suggestion/comment is VERY welcome. > > > > Regards, > > > > JaaC > > > By the VCC comment I meant that if the input from the CODEC is going all > the way up to VCC then the chip should be reading it correctly, _unless_ > the chip isn't set up right. > > Since your loopback is physical, and works right, that seems to indicate > that it's not a setup problem, or at least not _that_ setup problem. > > Did you look at the bit timing, and the frame timing? The bits out of > the codec should be lined up with the bits out of the TXD0 -- if they're > not then you could have perfect data at the wrong time and get the > results you're seeing. > > -- > > Tim Wescott > Wescott Design Services > http://www.wescottdesign.com
Tim, Yes, the bit timing seems to be ok (although I'll double check it). Do you think it coul dbe a problem with the input signal (to the DSP) being pulled up, thus giving the -8031 value, like if the DSP was seeing constant ones? I mean: do you think that if I buffer the signal with external (maybe two inverters, or a small CPLD) I could succeed? I know this sounds rather weird, but maybe works. What's your opinion? JaaC
Jaime Andr�s Aranguren Cardona wrote:

>>>Hi Tim, >>> >>>First, thanks for the reply. >>> >>>By "digital loopback" I mean the actual connection of the physical TXD0 >>>pin on the DSP to the RXD0 pin on the DSP (serial port 0 transmit and >>>receive pins). What I can conclude is that the receiverr side is >>>working OK. >>> >>>I certainly don't understand when you say "If your all-ones pattern is >>>going all the way up to VCC, then I would suspect that there is some >>>internal setup that isn't getting done right in the chip". Instead, I'd >>>thought that the all-ones pattern should go up to VCC, in order for the >>>DSP RXD0 pin to "see" the correct values of all-ones. >>> >>>Any further suggestion/comment is VERY welcome. >>> >>>Regards, >>> >>>JaaC >>> >> >>By the VCC comment I meant that if the input from the CODEC is going all >>the way up to VCC then the chip should be reading it correctly, _unless_ >>the chip isn't set up right. >> >>Since your loopback is physical, and works right, that seems to indicate >>that it's not a setup problem, or at least not _that_ setup problem. >> >>Did you look at the bit timing, and the frame timing? The bits out of >>the codec should be lined up with the bits out of the TXD0 -- if they're >>not then you could have perfect data at the wrong time and get the >>results you're seeing. >> >>-- >> >>Tim Wescott >>Wescott Design Services >>http://www.wescottdesign.com > > > Tim, > > Yes, the bit timing seems to be ok (although I'll double check it). Do > you think it coul dbe a problem with the input signal (to the DSP) > being pulled up, thus giving the -8031 value, like if the DSP was > seeing constant ones? > > I mean: do you think that if I buffer the signal with external (maybe > two inverters, or a small CPLD) I could succeed? I know this sounds > rather weird, but maybe works. What's your opinion? > > JaaC >
Never rule out really oddball solutions, but only after you've ruled out all the normal ones. But -- the voltage at DSP pin at the sampling instant is what matters, not what made it so. As long as the voltage is being sampled at the correct time it should be fine, buffered or not. You should double-check the manual to make sure that the sampling instant for the data is in the middle of the bit -- different synchronous serial ports define the read point differently; it's possible that the DSP will read the 'wrong' edge of it's own TX stream just fine, but get messed up by the CODEC's timing. The piece of CODEC datasheet that I found indicates that it receives a framing pulse as well as a data clock. If the data is not framed right the DSP would, indeed, see all ones, because it would be ignoring the CODEC when it's outputting 'real' data. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Posting from Google? See http://cfaj.freeshell.org/google/
> Never rule out really oddball solutions, but only after you've ruled out > all the normal ones. But -- the voltage at DSP pin at the sampling > instant is what matters, not what made it so. As long as the voltage is > being sampled at the correct time it should be fine, buffered or not. > > You should double-check the manual to make sure that the sampling > instant for the data is in the middle of the bit -- different > synchronous serial ports define the read point differently; it's > possible that the DSP will read the 'wrong' edge of it's own TX stream > just fine, but get messed up by the CODEC's timing. > > The piece of CODEC datasheet that I found indicates that it receives a > framing pulse as well as a data clock. If the data is not framed right > the DSP would, indeed, see all ones, because it would be ignoring the > CODEC when it's outputting 'real' data. > > -- > > Tim Wescott > Wescott Design Services > http://www.wescottdesign.com
Hello, Tim. Again, thank you for your comments. They did encourage me to try to find out, once again, hat could be going wrong. And yes, I found it: as I was using breadboard, I had a non.properly connected signal from the codec to the ADSP-2181 EzKit (yes, the old one!). And guess which one: RXD0. At ehe beginning I was looking with the probe attached to the signal on the board. But when I looked at the signal on the EzKit, I saw nothing... just 0V. , thus, the decompressor was rightly expanding it to -8031. I certainly can't explain why the "digital loopback" worked... today, when I tried it again, it didn't work, and pushed me to try closer to the DSP pins, and I found it. Now the codec works absolutely flawlessly... and I am happy!!! Regards, JaaC
Jaime Andr�s Aranguren Cardona wrote:

>>Never rule out really oddball solutions, but only after you've ruled out >>all the normal ones. But -- the voltage at DSP pin at the sampling >>instant is what matters, not what made it so. As long as the voltage is >>being sampled at the correct time it should be fine, buffered or not. >> >>You should double-check the manual to make sure that the sampling >>instant for the data is in the middle of the bit -- different >>synchronous serial ports define the read point differently; it's >>possible that the DSP will read the 'wrong' edge of it's own TX stream >>just fine, but get messed up by the CODEC's timing. >> >>The piece of CODEC datasheet that I found indicates that it receives a >>framing pulse as well as a data clock. If the data is not framed right >>the DSP would, indeed, see all ones, because it would be ignoring the >>CODEC when it's outputting 'real' data. >> >>-- >> >>Tim Wescott >>Wescott Design Services >>http://www.wescottdesign.com > > > Hello, > > Tim. Again, thank you for your comments. They did encourage me to try > to find out, once again, hat could be going wrong. > > And yes, I found it: as I was using breadboard, I had a non.properly > connected signal from the codec to the ADSP-2181 EzKit (yes, the old > one!). And guess which one: RXD0. At ehe beginning I was looking with > the probe attached to the signal on the board. But when I looked at the > signal on the EzKit, I saw nothing... just 0V. , thus, the decompressor > was rightly expanding it to -8031. > > I certainly can't explain why the "digital loopback" worked... today, > when I tried it again, it didn't work, and pushed me to try closer to > the DSP pins, and I found it. > > Now the codec works absolutely flawlessly... and I am happy!!! > > Regards, > > JaaC >
Those breadboards taught me to _always_ make my measurements on the IC pins. Even on a 'real' PC board there can be bad solder joints, broken traces, or wiring errors so there's value in taking the measurement at the pin. It doesn't work on BGA parts, which is a pain. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Posting from Google? See http://cfaj.freeshell.org/google/