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Complex Sampling Techniques

Started by MikeEdmans May 18, 2006
Hello out there,


I am confused about hardware implementation of complex sampling. Can I
just set up two ADCs sampling at the same rate, but with their clock
signals 90 degrees out of phase, or do I actually need to multiply my
input signal by a sine-wave?

I assume that by sampling with 2 ADCs with out-of-phase clocks, this is
the equivalent of multiplying by complex sine wave which is in phase with
the sampling clock. Does this work?

Thanks for your help!


MikeEdmans wrote:

> Hello out there, > > > I am confused about hardware implementation of complex sampling. Can I > just set up two ADCs sampling at the same rate, but with their clock > signals 90 degrees out of phase, or do I actually need to multiply my > input signal by a sine-wave? > > I assume that by sampling with 2 ADCs with out-of-phase clocks, this is > the equivalent of multiplying by complex sine wave which is in phase with > the sampling clock. Does this work? > > Thanks for your help! > >
Yes you can just sample with two ADCs with clocks that are 90 degrees out of phase. I've never done it this way; I'd look for problems having to do with dealing with DC bias and mismatch between the ADCs, but it should work. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Posting from Google? See http://cfaj.freeshell.org/google/ "Applied Control Theory for Embedded Systems" came out in April. See details at http://www.wescottdesign.com/actfes/actfes.html
You can also do the I/Q transform using only one A2D. Basically, you
just apply a Hilbert transform to the data in software.

Tim Wescott wrote:

> MikeEdmans wrote: > >> Hello out there, >> >> >> I am confused about hardware implementation of complex sampling. Can I >> just set up two ADCs sampling at the same rate, but with their clock >> signals 90 degrees out of phase, or do I actually need to multiply my >> input signal by a sine-wave? >> >> I assume that by sampling with 2 ADCs with out-of-phase clocks, this is >> the equivalent of multiplying by complex sine wave which is in phase with >> the sampling clock. Does this work? >> >> Thanks for your help! >> >> > Yes you can just sample with two ADCs with clocks that are 90 degrees > out of phase. I've never done it this way; I'd look for problems having > to do with dealing with DC bias and mismatch between the ADCs, but it > should work.
How is that different from sampling at twice the rate with a single ADC and assigning alternate samples to I and Q? If the scheme works in general -- there are special cases where it does work -- every normal sampling at 2k*f_max (k>1) is identical to complex sampling at k*f_max. Intuition says no. Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
Jerry Avins wrote:
> Tim Wescott wrote: > > >>MikeEdmans wrote: >> >> >>>Hello out there, >>> >>> >>>I am confused about hardware implementation of complex sampling. Can I >>>just set up two ADCs sampling at the same rate, but with their clock >>>signals 90 degrees out of phase, or do I actually need to multiply my >>>input signal by a sine-wave? >>> >>>I assume that by sampling with 2 ADCs with out-of-phase clocks, this is >>>the equivalent of multiplying by complex sine wave which is in phase with >>>the sampling clock. Does this work? >>> >>>Thanks for your help! >>> >>> >> >>Yes you can just sample with two ADCs with clocks that are 90 degrees >>out of phase. I've never done it this way; I'd look for problems having >>to do with dealing with DC bias and mismatch between the ADCs, but it >>should work. > > > How is that different from sampling at twice the rate with a single ADC > and assigning alternate samples to I and Q? If the scheme works in > general -- there are special cases where it does work -- every normal > sampling at 2k*f_max (k>1) is identical to complex sampling at k*f_max. > Intuition says no. > > Jerry
With 90 degrees between clocks you're sampling like this: IQ..IQ..IQ..IQ.. Your method is essentially 180 degrees between clocks, like this: IQIQIQIQIQIQIQIQ. Not only is it harder to pronounce, but your method doesn't give you that essential 90 degrees of phase difference. Were I doing this sort of thing, and had I a fast enough ADC, I'd sample like ABabABabABab, and I'd keep I = A - a and Q = B - b (which is really just a dead-simple digital quadrature mix-and-sample). -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Posting from Google? See http://cfaj.freeshell.org/google/ "Applied Control Theory for Embedded Systems" came out in April. See details at http://www.wescottdesign.com/actfes/actfes.html
What do you mean exactly that the clock signals are 90 degrees out of
phase? That they sample at different times?

Tim Wescott wrote:

  ...

> Your method is essentially 180 degrees between clocks, like this: > IQIQIQIQIQIQIQIQ.
Oof! I said it didn't work, didn't I? Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
Tim Wescott wrote:
> Jerry Avins wrote: > >> Tim Wescott wrote: >> >> >>> MikeEdmans wrote: >>> >>> >>>> Hello out there, >>>> >>>> >>>> I am confused about hardware implementation of complex sampling. Can I >>>> just set up two ADCs sampling at the same rate, but with their clock >>>> signals 90 degrees out of phase, or do I actually need to multiply my >>>> input signal by a sine-wave? >>>> >>>> I assume that by sampling with 2 ADCs with out-of-phase clocks, this is >>>> the equivalent of multiplying by complex sine wave which is in phase >>>> with >>>> the sampling clock. Does this work? >>>> >>>> Thanks for your help! >>>> >>>> >>> >>> Yes you can just sample with two ADCs with clocks that are 90 degrees >>> out of phase. I've never done it this way; I'd look for problems having >>> to do with dealing with DC bias and mismatch between the ADCs, but it >>> should work. >> >> >> >> How is that different from sampling at twice the rate with a single ADC >> and assigning alternate samples to I and Q? If the scheme works in >> general -- there are special cases where it does work -- every normal >> sampling at 2k*f_max (k>1) is identical to complex sampling at k*f_max. >> Intuition says no. >> >> Jerry > > > With 90 degrees between clocks you're sampling like this: IQ..IQ..IQ..IQ.. > > Your method is essentially 180 degrees between clocks, like this: > IQIQIQIQIQIQIQIQ. > > Not only is it harder to pronounce, but your method doesn't give you > that essential 90 degrees of phase difference. > > Were I doing this sort of thing, and had I a fast enough ADC, I'd sample > like ABabABabABab, and I'd keep I = A - a and Q = B - b (which is > really just a dead-simple digital quadrature mix-and-sample). >
Tim, I can't see that having a 90 degree offset between clocks does you much good. The signal samples from the 'Q' channel will have a phase of 45 degrees at Fs/2, decreasing towards a phase of zero degrees at DC. As far as I can see there are no analytic signals present at any frequency in the 'IQ' sample stream that is produced, and so you would not obtain the benefit of 'normal' IQ sampling in respect to alias suppression. It would seem to be more productive to simply sample at twice the rate *as with Jerry's 'IQIQIQIQ...' suggestion. Maybe I am missing something. Has anyone actually tried this method and got it to work? In particular, can you sample signals with components up to Fs using this method, without producing aliases below Fs? Regards, John
John Monro wrote:
> Tim Wescott wrote: >> Jerry Avins wrote: >> >>> Tim Wescott wrote: >>> >>> >>>> MikeEdmans wrote: >>>> >>>> >>>>> Hello out there, >>>>> >>>>> >>>>> I am confused about hardware implementation of complex sampling. Can I >>>>> just set up two ADCs sampling at the same rate, but with their clock >>>>> signals 90 degrees out of phase, or do I actually need to multiply my >>>>> input signal by a sine-wave? >>>>> >>>>> I assume that by sampling with 2 ADCs with out-of-phase clocks, >>>>> this is >>>>> the equivalent of multiplying by complex sine wave which is in >>>>> phase with >>>>> the sampling clock. Does this work? >>>>> >>>>> Thanks for your help! >>>>> >>>>> >>>> >>>> Yes you can just sample with two ADCs with clocks that are 90 degrees >>>> out of phase. I've never done it this way; I'd look for problems >>>> having >>>> to do with dealing with DC bias and mismatch between the ADCs, but it >>>> should work. >>> >>> >>> >>> How is that different from sampling at twice the rate with a single ADC >>> and assigning alternate samples to I and Q? If the scheme works in >>> general -- there are special cases where it does work -- every normal >>> sampling at 2k*f_max (k>1) is identical to complex sampling at k*f_max. >>> Intuition says no. >>> >>> Jerry >> >> >> With 90 degrees between clocks you're sampling like this: >> IQ..IQ..IQ..IQ.. >> >> Your method is essentially 180 degrees between clocks, like this: >> IQIQIQIQIQIQIQIQ. >> >> Not only is it harder to pronounce, but your method doesn't give you >> that essential 90 degrees of phase difference. >> >> Were I doing this sort of thing, and had I a fast enough ADC, I'd >> sample like ABabABabABab, and I'd keep I = A - a and Q = B - b (which >> is really just a dead-simple digital quadrature mix-and-sample). >> > > Tim, > I can't see that having a 90 degree offset between clocks does you much > good. The signal samples from the 'Q' channel will have a phase of 45 > degrees at Fs/2, decreasing towards a phase of zero degrees at DC. As > far as I can see there are no analytic signals present at any frequency > in the 'IQ' sample stream that is produced, and so you would not obtain > the benefit of 'normal' IQ sampling in respect to alias suppression. It > would seem to be more productive to simply sample at twice the rate *as > with Jerry's 'IQIQIQIQ...' suggestion. > > Maybe I am missing something. Has anyone actually tried this method and > got it to work? In particular, can you sample signals with components > up to Fs using this method, without producing aliases below Fs?
One of you is missing something, and I rather think its Tim. Either that, or Tim tends to work with rather narrow band cases close to the band edge. :-) Steve
MikeEdmans wrote:
> Hello out there, > > > I am confused about hardware implementation of complex sampling. Can I > just set up two ADCs sampling at the same rate, but with their clock > signals 90 degrees out of phase, or do I actually need to multiply my > input signal by a sine-wave? > > I assume that by sampling with 2 ADCs with out-of-phase clocks, this is > the equivalent of multiplying by complex sine wave which is in phase with > the sampling clock. Does this work?
No, it doesn't work. The reason is that you almost certainly will work with some broadband signal. The quadrature sampling needs to produce a signal where there is a 90 degree phase shift between I and Q at *each* frequency component. Your scheme can obtain that only for at most one single frequency. Rune