Hello. Is there anyone who has an experience of discrete wavelet transform implementation to achieve signal subband separation ? I'm working on certain signal processing that is handled in subbands, the signal is separated into reasonably narrow frequency subbands and then each subband is processed separately. The subband separation is to be attained by means of discrete wavelet transform (dwt() in MATLAB) decomposition. Following subband processing, the processed subbands are re-composed back which yields the processed signal. In MATLAB the decomposition is performed by dwt() while recomposition is inverse dwt, i.e. idwt(). I'm approaching the step of practical implementation assessment in which I have to gain an understanding of practical wavelet decomposition (and recomposition) algorithms used in DSP and their computational complexity. I have to get clear understanding of whether actual DWT algorithms will work on particular DSP hardware at particular constraints. I'mm be grateful if someone could share his experience in related field or at least to point me to the appropriate resources that cover (at least partially) the issue. Thanks in advance, Alex
Discrete wavelet transform implementation/existing algorithm
Started by ●August 24, 2006
Reply by ●August 25, 20062006-08-25
The 4th. International Signal Processing Conference offers in-depth training presented by the industry's leading companies: hundreds of peer-reviewed papers, lectures and workshops. Conference: Monday October 30-Thursday November 2, 2006 Exhibits: Tuesday October 31- 12:00 PM- 6:00 PM Wednesday November 1, 2006 - 10:00 AM - 6:00 PM Different sponsored speaking opportunities are available. For more information please contact us at speak@gspx.com. CONFERENCE AT A GLANCE TECHNICAL WORKSHOPS -Monday October 30, 2006 "Implement the Direct Digital Synthesis of a Radar Chirp Through the Integration of High Performance Annapolis FPGA Based Hardware with a Simple Host Code Driver, Using CoreFire" Click here for more information "Workshop on Embedded Signal Processing and Communications System Design" Click here for more information "Hardware Design Flows Using Model-Based Design" Click here for more information TECHNICAL SEMINAR -Tuesday October 31, 2006 "Accelerating Your Signal Processing Project with Today's MATLAB and Simulink" Click here for more information TECHNICAL PANEL SESSIONS "Hot Markets: Driving Growth in Signal Processing" Click here for more information "Design & Verification: Can the Analog/Mixed Signal Standard Bridge the Chasm?" Click here for more information "New Trends in Processors for Digital Video" Click here for more information "Integrating IP in Multicore DSP/Processor SoCs" Click here for more information "Cellular evolution and the impact of mobile WiMAX. Can't we just get along?" Click here for more information TECHNICAL PAPER PRESENTATIONS Click here for more information ---------------------------------------------------------------------------= ----- TECHNICAL WORKSHOPS -Monday October 30, 2006 WORKSHOP AM01 8:30 AM-12:00 PM "Implement the Direct Digital Synthesis of a Radar Chirp Through the Integration of High Performance Annapolis FPGA Based Hardware with a Simple Host Code Driver, Using CoreFire" Presented by Annapolis Micro Systems Test designs which were previously too complex and difficult to develop can now be fully implemented within hours, using the Annapolis WILDSTAR hardware and CoreFire FPGA Application Development Suite. See how to perform direct digital synthesis (DDS) of a RADAR chirp. The Annapolis 2=2E3 GSps DAC I/O card can easily directly generate many simultaneous RADAR signals within the standard VHD, UFH, and L bands (50 MH to 2 GHz). This workshop demonstrates, end-to-end, the implementation of one RADAR chirp generator through the integration of high-performance hardware along with a simple host code driver. WORKSHOP AM02 8:30 AM-12:00 PM "Workshop on Embedded Signal Processing and Communications System Design" Presented by The MathWorks This half-day workshop will provide you with a comprehensive overview of modeling, simulation, implementation, and verification of real-world, real-time signal processing systems. All major aspects of Model-Based Design, including algorithm development; system modeling, advanced filter design techniques, fixed-point system design, bit-true simulation, and automatic scaling; automatic C code generation, and design verification, and hardware-in-the-loop testing. The session includes extensive live demonstrations including simulations as well as implementation and verification of embedded signal processing systems on DSP hardware to illustrate each concept. During this workshop, you will learn how integrated tools from The MathWorks can help you to: =B7 Model complex signal processing applications =B7 Design, simulate, and prototype complete signal processing systems =B7 Use a complete design flow from system simulation to implementation on DSPs WORKSHOP PM01 1:00 PM-4:30 PM "Hardware Design Flows Using Model-Based Design" Presented by The MathWorks System architects and algorithm designers have been using Model-Based Design to capture executable specifications of complex electronics systems and simulate the behavior in MATLAB and Simulink. Furthermore, these engineers have come to rely on these tools to accelerate their design cycles by automatically generating 'C' code for programming DSP and micro-controllers. Encouraged by this trend, hardware engineers are now asking for high level of design abstraction. In this workshop, we will introduce you to hardware design flows and design tools that will accelerate your design cycle, increase design reliability, improve design quality, and provide repeatable results. ---------------------------------------------------------------------------= ----- TECHNICAL SEMINAR -Tuesday October 31, 2006 "Accelerating Your Signal Processing Project with Today's MATLAB and Simulink" Presented by The MathWorks In this three-part seminar, you'll learn how today's MATLAB and Simulink can help accelerate projects to build real-time signal processing and communications systems. Presenters and topics will include: 1) Houman Zarrinkoub: "What's new in MathWorks Release R2006b?" Houman Zarrinkoub is product manager for MathWorks signal processing and communications products. Houman will cover the new capabilities for verification and automatic code generation in MathWorks Release R2006b. These capabilities with be presentation in the context of a Model-Based Design development flow, considering both hardware and embedded software as target technologies. 2) Gabe Moretti: "Best Practices For Adopting Model-Based Design into Signal Processing Project" Gabe Moretti is a recognized expert in all aspects of the EDA industry. Gabe has over thirty years of experience developing EDA tools spanning the range from design capture to chip layout. From 2000 he has been covering the EDA industry as a writer and editor first with EDN Magazine and now with gabeoneda.com . In this section of the seminar, Gabe will present key finding for a report he recently completed that helps engineering teams adopt Model-Based Design development flow for signal processing and communication products. The best practices documented in the report were not theoretical but were synthesized empirically by studying companies that have successfully accomplished such as adoption already. 3) Speaker TBA: "A User's Perspective: A first look at the new capabilities in R2006b for automatic code generation" MathWorks latest release offers significantly enhanced capabilities for automatic code generation for hardware and software. But what does this mean from a user's perspective? This section of the seminar will address the practical application of these enhancements for prototyping code, test bench code, and production code. Issues related to the integration of hand-written code, legacy code, and third party IP alongside the automatically generated code will be addressed. ---------------------------------------------------------------------------= ----- TECHNICAL PANEL SESSIONS "Hot Markets: Driving Growth in Signal Processing" This panel will examine some of the key areas fueling high-growth applications for signal processing. In addition to discussing developments within traditional markets such as Transportation, Consumer, Industrial, and Military-Aerospace (with an update of major subfield applications in audio, digital image processing and speech processing) the discussion will focus on these expected drivers of increased demand: -Medical diagnosis and treatment (beyond ultrasound imaging) -Design and role of signal processors in affordable mobile phones for developing nations -Signal processing in the Embedded Space -Signal processors for Triple Play (the convergence of voice, video, and data on the same network) applications Moderator: Murray Slovick, Editorial Director Electronics Group -Hearst Business Media "Design & Verification: Can the Analog/Mixed Signal Standard Bridge the Chasm?" Historically, the design and verification functions in the development of a SOC design has remained a proverbial "tale of two cities". The needs and the tasks of the design teams overlap minimally with that of the verification team. The tools and methodologies developed for each of these functions differ in many ways. With the tremendous pressure to create complex yet robust designs in shorter periods of time, there is an increasing need to address how useful and necessary information is readily available for either team to use. In addition to this, we need to consider how AMS standards can help create placeholders for this information to be provided, updated and reused in an efficient and relatively easy manner. Significant progress has been made in the recent past to put some of the research ideas into practice by system and chip designers, and EDA tool developers. The standards organizations have provided an infrastructure for open discussion and proposing industry-wide solutions. This session will consider the different bridges -- tools, methodologies and standards -- that will alleviate and simplify the tasks of design and verification teams. "New Trends in Processors for Digital Video" Digital video markets seem poised for explosive growth. Advances in technology are enabling more and more products to offer digital video capabilities. From cell phones to personal video recorders, from surveillance equipment to video over DSL, digital video promises to become the new "killer app" for embedded processors. As digital video applications become more numerous and more diverse, so are the processors targeting these applications. Developers of digital video applications can now choose from a range of digital signal processors (DSPs), general-purpose processors (GPPs), FPGAs, and more. As digital video applications continue to evolve, how will the processor landscape change? This panel will explore trends in processors targeting video applications. Panelists will discuss how applications are changing, and how established and upstart processor vendors are striving to meet new demands. The panel will confront controversial questions such as whether hardwired solutions can remain competitive in the face of multiple standards and diverse application requirements. We will also investigate how technology advances and shifts in vendor focus are making emerging players like FPGAs more attractive for digital video applications. Moderator: Jeff Bier, Cofounder and President of Berkeley Design Technology, Inc. (BDTI) "Integrating IP in Multicore DSP/Processor SoCs" Multiple cores -- both DSP and conventional processors -- are becoming wide-spread in high-performance SoCs. This panel of experts will discuss the issues that are critical to the selection and successful integration of intellectual property (IP) in such mixed, multicore systems, whether implemented in an ASIC or an FPGA. The panel will be moderated by John Miklosz, Publisher and Editor-in-Chief of SOCcentral.com, the premier open website for ASIC, FPGA, EDA, and IP news, articles and design information. "Cellular evolution and the impact of mobile WiMAX. Can't we just get along?" Cellular technology continues evolving from its GSM and CDMA foundations into HSDPA/HUSPA, 1xEV-DO/Rev A, and Long Term Evolution (4G). But the future role of mobile WiMAX is not fully understood. Will it be squashed by rapidly evolving high-speed cellular or will it subsume high-speed data traffic from cellular? Perhaps WiMAX will serve only a narrow, specialized market. The purpose of this panel is to examine the possibilities of mobile WiMAX co-existence with cellular and provide insight for future planning. Moderator: Will Strauss, President of Forward Concepts ---------------------------------------------------------------------------= ----- TECHNICAL PAPER PRESENTATIONS Algorithms Implementation of G.168 Compliant Network Echo Canceller Using Multirate Analysis On Insights into the Probability density function of the test statistic of one nonlinear GLR detector arising from fMRI Architectures Reconfigurable Computing - An Alternative Architecture Paradigm for Space Applications Reduced Latency Auxiliary Processing Unit for Large Bit-Width Instruction Set Extensions ASIC Design Specification-driven Exploration and Implementation of Partially Re-configurable Processors Audio Tools Extending aacPlus by MPEG Surround Support Automotive Fast Booting Techniques for Automotive Telematics and Infotainment Systems 3D Graphics for In-Car Navigation and Infotainment Systems Reconfigurable Hardware in Automotive Systems - A Rapid Prototyping Approach Designing FlexRay-based Driver Assistance System using Early Hardware-Software Architecture Exploration Bus Request-Response Trace for a SMART Interconnect System Automotive Network Standards and the Onboard Communication in City Buses and Coaches Going Green with Signal Conditioner ICs for Automotive Applications Biomedical Recognition of Cancer Cell using Fuzzy Logic and Genetic Algorithms The Delay Model of a CMOS Based Biochip Biometrics Fingerprint Verification Based on Image Filtering of Ridges Controls Use of GEDAE ror Documenting and Designing of Non Signal Processing Applications Data Acquisition Wideband ADC Nonlinearity Compensation (8-Bit, 1.5 GHz ADC with 65 dB SFDR) A Top Down Design Approach To RSD-Cyclic Analog-to-Digital Data Converters RC Implementation of an Audio Frequency Band Butterworth MASH Delta-Sigma ADC RC Implementation of an Audio Frequency Band Fourth-Order Chebyshev Type II Delta-Sigma ADC Data Communications An Efficient RSA Based Security Algorithm for VPNs A Study of High Performance Security Design in FPGA Digital Filters Interrelation betweeon Coefficients of Transfer Function, Form of a Topological Matrix and Complexity of the IIR Digital Filter with Any Structure Asynchronous Domain Calibration of Equalization Filter for Data Storage Read Channel Comb Basic DSP The Role of Functional Partitioning in Multi-core Systems A High Performance Block Floating Point Systolic FFT Not Limited to Powers of Two Why DSPs vs. FPGAs is a Stupid Argument High Performance DSP Design for ASIC and FPGA DSP Core Design VLIW Architecture in FPGA Implementation DSW Software Serial RapidIO Enables Performance Gains for High-Bandwith DSP Applications EDA Tools Creating a Consistent Verification Environment from Algorithm to RTL Reusable Verification for a Bus-based Environment>From Algorithm Design to Product Development: Criteria for Selectingthe Best Software Integration Environment FPGA FPGAs for Signal Processing - Boon or Bane An Embedded Adaptive Filtering System on FPGA Design FPGAs as Low-Cost Solutions for Digital Down/Up Converter Systems in Wireless and Wireline Base Stations Design FPGA based Pseudo Random Number Generators: A Comparative Study Image Processing Real Time Implementation of S+P Transformation On the Notion of Valid Filters in Morphological Image Processing A Low Cost Real Time Machine Vision System for Printing Industry Based on CMOS Image Sensor An Efficient Method for Face Localization and Recognition in Color Images Facial Recognition with Singular Value Decomposition Imaging Application of Image Processing Techniques Using Satellite SAR Data in the Niger-Delta Industrial Control Design of World Wide Input Three-Phase PFC Rectifier Using DSP Optimality Problem of Digital PI Controller for Load Current in DC/DC Converters High Stabilization by Control Theory of Present Age An Electronic Engineering Analytical Model of Point-to-Point DSP Using a Conical Profile of Laser Beams for Detection Instrumentation & Testing PC Based Real Time Monitoring of Breath Using Labview A Strategy for Behavioural Synthesis of an Oscilloscope and Spectrum Analyzer in SystemC IP Prepare For the Future - Protect Your Patents Globally Now Medical Applications Real Time Adaptive Filtering for Digital X-Ray Applications Military UPHAR Early Warning System for Detecting Buried Mines and Unexploded Ordinance Modeling and Simulation RPT-A Demonstration of Model Driven Development with Automatic Implementation using Gedae Multimedia Optimized Multimedia Codecs for i.MX and MXC Systems Issues on Portable Media Player Architecture Design on Freescale i.MX 31 Board Networking Enhancement of Industrial Ethernet and its performance analysis Joint Deterministic Routing and FDL Path Routing under Mobile Mesh Networks NodeB Enablement on the Freescale MPC8360E Communications Processor Neural Networks Tuning of PI Control Parameters by Neural Network Digital PID Controller by Neural Network Parallel Architectures Solving the Silicon Challenge of Massively-Parallel, Multi-Processor IC Architectures Solving the Programming Challenge for Massively-Parallel, Multi-Processor Chips Simple Creation of Multi-Core Packet-Processing Pipelines in FPGAs Power Management Low Energy Code Positioning Algorithm for Wireless Applications Digital Control of Switching Power Converters for POL Programmable and Programming DSPs DSP Performance Comparison by Using the SMV Benchmark Goodbye, Mr. DSP: DSP IP Cores are Superfluous for New SOC Designs DSP Algorithms: Back to the Basics ASIP Design Methodology with Target's Chess/Checkers Retargetable Tools Leveraging DSPs from Open Source Multimedia Frameworks>From Matlab=99 Code to Implementation - Tricks and TipsRadar Direction of Arrival Estimation using Innovative Signal Processing Rapid Prototyping Evolution of Design Flow for DSP Rapid Prototyping of DRFM Architectures for Performance Assessment Accelerating Virtual Prototype of DSP Algorithms on Xilinx Virtex Platform Issues and Opportunities for Rapid Prototyping of DSP Application on FPGA-Centric Embedded Platforms RPT-Model Driven Development - Measures of Separation between Functionality and Implementation RF Systems Detection and Localization of RF Radar Pulses in Severe Noisy Environment Using Wavelet Packets Transform Combined with Higher-Order-Statistics Thresholding Technique RTOS Real Time Applications Profiling Tool Satellite Communications The Design of a 2.4 GHz Micro-Satellite Communication System SDR Implementation of a Scalable Software Defined Radio Prototyping Platform with Giga-Sample AFE A Self-sorting FFT Implementation on the VD32040 Vector Processor Benchmarking MIMO OFDM Radio Algorithms on the EVP Study on Software Optimization for Software Defined Radio using Multiple-core DSP On the Design of Deployable IEEE802 16 Base Stations using a Multi-core SDR Approach IF Processing Capabilities for SDR Applications Security Securing M2M Applications Soc/IP Design State-of-the-art in Using Software for Modeling Hardware: Concepts and Standards MPSOC Flow for Multiformat Video Decoder based on Configurable and Extensible Processors Physical Design Techniques of a Multi-Protocol Serdes Phy Do Not Tape Out Naked- Strategies for Effective Coverage in SoC Verification Software Tools Remote File Server and Client for Freescale MSC81xx DSP Enhancements in Procedural Abstraction Technique for Code Optimization in ARM Processor Floating- to Fixed-Point Conversion of MATLAB Algorithms Targeting FPGAs A High-Level Co-Design and Co-Simulation Framework for FPGA based Hardware/Software Development High Level Languages Enabling High Performance DSP Programming with Embedded C State Machines Practical Statecharts for Tiny Embedded Systems Integrating Your Processor-Specific Code with Model-Based Design of Embedded Systems Information Processing for the ProTo Embedded Profiling Tool Speech Processing Extraction of Features for Speech Processing using Modified LPC Language Independent Automated Segmentation of Speech using Bach Scale Filter-banks Speech Compression Using Warped LPC with MLT-SPIHT Algorithm Performance Evaluation and Comparison of Voice Activity Detection Algorithms System Modeling Memory Modeling Approach to Multimedia Applications Performance and Power Analysis and Characterization Test and Verification Hardware Based Simulation Acceleration Tool Video Applications Low Cost and Portable Streamer for Development of Decoder Stages in Digital Television Receptors Video Arcitectures Design and Implementation of an IDCT Engine Using Partitioned Distributed Arithmetic Video Coding Optimization of the Hexagon-Based Search Algorithm on SIMD Architectures Video Compression H=2E264 Decoder Optimization for ARM926EJ-S Processor A Scalable Video and Image Processing Platform Implementing Multi-standard High Definition H.264, MPEG-2 and VC-1 Video Compression in a Software Programmable "Smart Memory" fabric Scalable Multi-processor Software Architecture for an MPEG-2 to H.264 Transcoder Memory Optimized H.264 Video Encoder on a Programmable DSP Processor Optimal Resource Sharing Strategies for a Streaming System Low Complexity Motion Adaptive Intra-Refresh Algorithm for Videophone Applications Video Processing Sensitivity Analysis of the Various H.264 CODEC Architectural Decisions and the Impact on the Output Video Quality System Design Tricks for Low-Power Video Processing Low Latency Streaming System - Design Considerations VLSI Architectures A Novel Architecture for Sobel Edge Detection Operator Linear Feedback Shift Registers In Wireless Communication Voice over IP Detection of Multiple Reflections in Echo Paths Using Multi-Rate Sub-Band Processing for Echo Cancellation Leveraging Existing Applications Processors in Mobile Devices Wavelet Image Compression Using Pixel Classification and Sorting TMS320C54X Processor Multi-Wavelet Based Moving Object Detection and Segmentation Wireless and Telephony Low Power RF CMOS Receiver Front-end Using Reflex Amplifier Remote Fingerprint Entry Verification Using Bluetooth Wireless Technology Non-primitive Turbo Codes in MIMO System over Flat Fading Channel "No Strings Attached" - ZigBee to UWB: Unleashing the Possibilities for Consumer Electronics WiMAX OFDM BaseStation Receiver - Design and Implementation on StarCore DSP Wireless Ad Hoc Network Routing Algorithm Based on Mobility Pattern using Fuzzy Logic Joint Deterministic Routing and FDL Path Routing Under Mobile Mesh Networks Implementation of Adaptive Multirate Speech Codec on TMS320C5416 Resource Optimization for High Channel Density Communication Systems On Insights into the Probability density function of the test statistic of one nonlinear GLR detector arising from fMRI 3G Femtocells: The New Alternative Multi-user Detection for Multi-path Rayleigh Fading Channel DS-CDMA System Using Two Dimensional Rake Receiver Based on Genetic Algorithm Long Range Passive RFID Tags Using Ultra-wideband Signaling New Insights into the Probability Density Function of the Test Statistic for One Nonlinear GLR Detector Arising from fMRI
Reply by ●August 25, 20062006-08-25
PARTICLEREDDY wrote:> The 4th. International Signal Processing Conference offers ...Please learn how to start a new thread when that's appropriate. Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
Reply by ●August 25, 20062006-08-25
Reply by ●August 26, 20062006-08-26
>PARTICLEREDDY wrote: >> The 4th. International Signal Processing Conference offers ... > >Please learn how to start a new thread when that's appropriate. > >Jerry >-- >Engineering is the art of making what you want from things you can get. >����������������������������������������������������������������������� >PATRIC, please refrain from hijacking my thread, this is against community rules. I will kindly ask Moderators to remove PATRIC's response which is disrutbing. Thanks in advance, Alex
Reply by ●August 26, 20062006-08-26
Alexz wrote: ...> PATRIC, please refrain from hijacking my thread, this is against community > rules. > I will kindly ask Moderators to remove PATRIC's response which is > disrutbing.That's a good sentiment, but know this: there is no moderator. Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
Reply by ●August 26, 20062006-08-26
>Alexz wrote: > > ... > >> PATRIC, please refrain from hijacking my thread, this is againstcommunity>> rules. >> I will kindly ask Moderators to remove PATRIC's response which is >> disrutbing. > >That's a good sentiment, but know this: there is no moderator. > >Jerry >-- >Engineering is the art of making what you want from things you can get. >����������������������������������������������������������������������� >Oh, that's not good....I wsa hoping..
