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FIR: Dealing with negative values and scaling

Started by dave...@hotmail.com September 11, 2006
Fred Marshall wrote:
> "Jerry Avins" <jya@ieee.org> wrote in message > news:-rqdnZa_d6yc95TYnZ2dnUVZ_tOdnZ2d@rcn.net... >> glen herrmannsfeldt wrote: >>> Jerry Avins wrote: >>> >>> (snip) >>> >>>> Subtracting a running average from a signal in order to remove offset is >>>> a form of high-pass filtering, but not usually the best digital kind for >>>> the job. (It's great for analog when done right: capacitor coupling.) >>>> Digital or analog, the filter's settling time at startup can be a >>>> problem. Is there a URL for R.B-J.'s DC blocker? >>> The system I was working on not so long ago took some samples before >>> the pulse being measured arrived, when it really was supposed to be >>> zero, to use as a baseline. Then summed the samples where the pulse >>> is to integrate over the pulse. >> Establishing a base reference is a Good Thing. In hardware, the technique >> is called auto-zero. Subtracting what measurement indicates ought to be >> zero is not the same as subtracting an average of the previous signal. >> > > Jerry, > > Yes, but subtracting the average of a precursor where "signal is not > present" epoch could be the former and not the latter. My question to the > OP was: "how do you know?"
Doing it right consists of disconnecting the signal before making the measurement. One of my commercial instruments uses a 68HC11, which has an eight-way multiplexed ADC. One of the inputs is grounded, and another is tied to a stable reference voltage. These are read in each reading cycle along with three current transformers with two ranges each. Both gain drift and offset are removed by software. Jerry -- Engineering is the art of making what you want from things you can get. &#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;
"Jerry Avins" <jya@ieee.org> wrote in message 
news:s_udnRsjAJJw6JTYnZ2dnUVZ_q2dnZ2d@rcn.net...
> Fred Marshall wrote: >> "Jerry Avins" <jya@ieee.org> wrote in message >> news:-rqdnZa_d6yc95TYnZ2dnUVZ_tOdnZ2d@rcn.net... >>> glen herrmannsfeldt wrote: >>>> Jerry Avins wrote: >>>> >>>> (snip) >>>> >>>>> Subtracting a running average from a signal in order to remove offset >>>>> is a form of high-pass filtering, but not usually the best digital >>>>> kind for the job. (It's great for analog when done right: capacitor >>>>> coupling.) Digital or analog, the filter's settling time at startup >>>>> can be a problem. Is there a URL for R.B-J.'s DC blocker? >>>> The system I was working on not so long ago took some samples before >>>> the pulse being measured arrived, when it really was supposed to be >>>> zero, to use as a baseline. Then summed the samples where the pulse >>>> is to integrate over the pulse. >>> Establishing a base reference is a Good Thing. In hardware, the >>> technique is called auto-zero. Subtracting what measurement indicates >>> ought to be zero is not the same as subtracting an average of the >>> previous signal. >>> >> >> Jerry, >> >> Yes, but subtracting the average of a precursor where "signal is not >> present" epoch could be the former and not the latter. My question to >> the OP was: "how do you know?" > > Doing it right consists of disconnecting the signal before making the > measurement. One of my commercial instruments uses a 68HC11, which has an > eight-way multiplexed ADC. One of the inputs is grounded, and another is > tied to a stable reference voltage. These are read in each reading cycle > along with three current transformers with two ranges each. Both gain > drift and offset are removed by software. > > Jerry
Jerry, Well, that's a nice way to do it of course. I'm concerned that folks might want to do such calibration based on an assumed "quiet" single input rather than a special input. How do they know it is time to make the measurement? Maybe select from a set of assumed quite cases? I'm sure there are systems that do it though - I don't have an example of my own. Fred

Jerry Avins wrote:


> Doing it right consists of disconnecting the signal before making the > measurement. One of my commercial instruments uses a 68HC11, which has > an eight-way multiplexed ADC.
Why would you need to do that for the dull 8 bit ADC?
> One of the inputs is grounded, and another > is tied to a stable reference voltage.
So it was proven that 0 == 0 and Vref == Vref. There is no active circuitry in the ADC.
> These are read in each reading > cycle along with three current transformers with two ranges each. Both > gain drift and offset are removed by software.
The ADC nonlinearity is still there, so is the charge injection from the mux, cross-coupling between the channels, input RC and the digital noise. No point to do that in the particular case of HC11. Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com
Vladimir Vassilevsky wrote:
> > > Jerry Avins wrote: > > >> Doing it right consists of disconnecting the signal before making the >> measurement. One of my commercial instruments uses a 68HC11, which has >> an eight-way multiplexed ADC. > > Why would you need to do that for the dull 8 bit ADC? > >> One of the inputs is grounded, and another is tied to a stable >> reference voltage. > > So it was proven that 0 == 0 and Vref == Vref. There is no active > circuitry in the ADC.
It is a switched-capacitor design, with temperature dependent leakage amounting to a few LSB's worth, and other errors measured but not accounted for. The off-chip voltage reference is more stable and repeatable from one unit to the next than the '11's internal reference. Without the external reference, each unit would have had to to be tweaked at assembly. Ugly.
>> These are read in each reading cycle along with three current >> transformers with two ranges each. Both gain drift and offset are >> removed by software. > > The ADC nonlinearity is still there, so is the charge injection from the > mux, cross-coupling between the channels, input RC and the digital > noise. No point to do that in the particular case of HC11.
Cross coupling was minimal because we read the three phases of a balanced load. Ground and Vref separate the high- and low-level channels. The best justification for the scheme is that it worked better with offset and gain correction than without. (The controller modeled a motor's internal temperature using cascaded leaky integrators.) Jerry -- Engineering is the art of making what you want from things you can get. &#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;
>Hi all, > >I've run across a 'problem' that seems like it would be relatively >commonplace....but I am unsure how to address it. Can anyone point me >to appropriate literature (or even offer suggestions)? > >Given: >16-bit fixed point processor >42-tap FIR filter (coefficients on [-32767, 32768]) >Input values on [-32767, 32768] > >The accumulator is 40-bit, so it can handle the 42-taps without >overflow, regardless of the input values. Step response (value of '1' >on input) after 42 passes results in a value of about 32000 (I believe >this is considered to be the filter gain, but please correct me if I'm >wrong). > >I see a problem if my input values hover around zero...the potential >for the output to swing rapidly from positive to negative. Can I shift >my input range to [0, 65535]? Does this have any >detrimental/unexpected effect? > >The other problem I see is related to scaling. My output should be >16-bit, same as the input. My initial thought is to divide the >accumulated result by the filter gain, and then by the number of taps. >Does this sound reasonable?
You're on the right track with dividing by the filter gain to scale the output. The maximum value of the filter's step response is the maximum possible output of the filter. This will tell you what the MSB of your 16-bit scaled output should be in order to avoid overflow. Output MSB = log2(max(step response)) Round this result up if it's not an integer (usually never is). Also, if your bit index starts at 0, then subtract 1 from the above result. Example: 40-bit accumulator = 39:0 Assume log2(max(step response)) = 32.xxx This means the max possible value out of the filter will fit into a 33-bit number (32:0) So, if you want to scale the filter output to a 16-bit number, then start at 32 and go down 16 bits. (32:17) The bits above 32 won't carry any information and the bits below 17 will be mostly noise. Comments are welcome ~Ben Davis
>On the other hand, if I allow negative inputs, is there a recommended >method to scale the result to a 16-bit value? I can't seem to get my >brain around this one. > >Cheers, >Dave > >
bdavisvt wrote:
<clipped>
> ... The maximum value of the filter's step response is the maximum > possible output of the filter. ...
<clipped> If only this were true. Maximum possible magnitude of FIR output is: (maximum magnitude input)*sum(abs(FIR filter coeffs)) adjusted for any scaling adjustments you are doing (maybe none). Dirk Bell DSP Consultant
in article Z5udnTGae8ZbC5fYnZ2dnUVZ_vydnZ2d@giganews.com, bdavisvt at
hokieben@gmail.com wrote on 09/15/2006 08:04:

>> Hi all, >> >> I've run across a 'problem' that seems like it would be relatively >> commonplace....but I am unsure how to address it. Can anyone point me >> to appropriate literature (or even offer suggestions)? >> >> Given: >> 16-bit fixed point processor >> 42-tap FIR filter (coefficients on [-32767, 32768]) >> Input values on [-32767, 32768] >> >> The accumulator is 40-bit, so it can handle the 42-taps without >> overflow, regardless of the input values. Step response (value of '1' >> on input) after 42 passes results in a value of about 32000 (I believe >> this is considered to be the filter gain, but please correct me if I'm >> wrong). >> >> I see a problem if my input values hover around zero...the potential >> for the output to swing rapidly from positive to negative. Can I shift >> my input range to [0, 65535]? Does this have any >> detrimental/unexpected effect? >> >> The other problem I see is related to scaling. My output should be >> 16-bit, same as the input. My initial thought is to divide the >> accumulated result by the filter gain, and then by the number of taps. >> Does this sound reasonable? > > You're on the right track with dividing by the filter gain to scale > the
output. The maximum value of the filter's step response is the
> maximum
possible output of the filter. This will tell you what the MSB of
> your
16-bit scaled output should be in order to avoid overflow.
> > Output MSB = log2(max(step response)) > > Round this result up if it's not an integer (usually never is).
i think there are worser worst cases than a (presumed full-scale) step response. possibly the worst case is alternating (at Nyquist) -1, 1 pairs, except for one place where either a -1 or +1 is skipped and you get something that looks like: ..., -1, +1, -1, +1, +1, -1, +1, -1, ... that sucker will blow up with ideal (sinc() function) reconstruction. dunno if *any* limit to the MSB will suffice for this worser case. but maybe it's okay for the FIR coefficients. -- r b-j rbj@audioimagination.com "Imagination is more important than knowledge."