My interleaver uses 50 branches and the delay units are each 100*n (0<=n<50) data. Large memory crequirement makes shift register implementation inhibitive. With a single port RAM to hold the data, are there standard and well-known routine to generate read and write addresses? Thank you.
How do I address convolutional interleaver using memory instead of registers.
Started by ●March 22, 2007
Reply by ●March 22, 20072007-03-22
news reader wrote:> My interleaver uses 50 branches and the delay units are > each 100*n (0<=n<50) data. Large memory crequirement > makes shift register implementation inhibitive. > > With a single port RAM to hold the data, are there standard > and well-known routine to generate read and write addresses?Standard circular buffer code? Jerry -- Engineering is the art of making what you want from things you can get. ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯
Reply by ●March 22, 20072007-03-22
"Jerry Avins" <jya@ieee.org> wrote in message news:Ec2dnbeDEsmiD5_bnZ2dnUVZ_hzinZ2d@rcn.net...> news reader wrote: >> My interleaver uses 50 branches and the delay units are >> each 100*n (0<=n<50) data. Large memory crequirement >> makes shift register implementation inhibitive. >> >> With a single port RAM to hold the data, are there standard >> and well-known routine to generate read and write addresses? > > Standard circular buffer code? > > Jerry > -- > Engineering is the art of making what you want from things you can get. > �����������������������������������������������������������������������Don't understand, Standard circular buffer code? Is it a very simple mathematics I haven't grasped yet? Or is it more abscure trick like bits-reversal in FFT algorithms?
Reply by ●March 22, 20072007-03-22
One additional question, My design is about a high rate communication link. Regarding the shift register operations, is it the shift operation only happens when the branch is being accessed? While data is being written/read from one active branch, all other branches don't shift, as described in the Mathworks. Is my understanding correct? http://www.mathworks.com/access/helpdesk/help/toolbox/comm/index.html?/access/helpdesk/help/toolbox/comm/ug/a1038936599b1.html Thank you. "news reader" <newsreader@google.com> wrote in message news:ettumb$snn$1@mawar.singnet.com.sg...> My interleaver uses 50 branches and the delay units are > each 100*n (0<=n<50) data. Large memory crequirement > makes shift register implementation inhibitive. > > With a single port RAM to hold the data, are there standard > and well-known routine to generate read and write addresses? > > Thank you. > > >
Reply by ●March 22, 20072007-03-22
news reader wrote:> "Jerry Avins" <jya@ieee.org> wrote in message > news:Ec2dnbeDEsmiD5_bnZ2dnUVZ_hzinZ2d@rcn.net... >> news reader wrote: >>> My interleaver uses 50 branches and the delay units are >>> each 100*n (0<=n<50) data. Large memory crequirement >>> makes shift register implementation inhibitive. >>> >>> With a single port RAM to hold the data, are there standard >>> and well-known routine to generate read and write addresses? >> Standard circular buffer code? > > > Don't understand, Standard circular buffer code? > > Is it a very simple mathematics I haven't grasped yet? > Or is it more abscure trick like bits-reversal in FFT algorithms?Keep two pointers, one for where to put input and one for where to take output. When they are the same, the "shift register" is empty. When an input arrives, store it at the location pointed to by the input pointer and advance the pointer*. When you want an output, advance the output pointer* and take the output from the new location. Although it's possible to detect a full buffer, needn't be concerned because that's a failure in your application. *The pointers must be advanced modulo N (N is the size of the buffer) so they will wrap around. Then N is a power of two and the beginning of the buffer is properly located in memory, MOD is simply done by masking. Jerry -- Engineering is the art of making what you want from things you can get. ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯
Reply by ●March 22, 20072007-03-22
"Jerry Avins" <jya@ieee.org> wrote in message news:PaadnWxXn6zmBp_bnZ2dnUVZ_oupnZ2d@rcn.net...> news reader wrote: >> "Jerry Avins" <jya@ieee.org> wrote in message >> news:Ec2dnbeDEsmiD5_bnZ2dnUVZ_hzinZ2d@rcn.net... >>> news reader wrote: >>>> My interleaver uses 50 branches and the delay units are >>>> each 100*n (0<=n<50) data. Large memory crequirement >>>> makes shift register implementation inhibitive. >>>> >>>> With a single port RAM to hold the data, are there standard >>>> and well-known routine to generate read and write addresses? >>> Standard circular buffer code? >> >> >> Don't understand, Standard circular buffer code? >> >> Is it a very simple mathematics I haven't grasped yet? >> Or is it more abscure trick like bits-reversal in FFT algorithms? > > Keep two pointers, one for where to put input and one for where to take > output. When they are the same, the "shift register" is empty. When an > input arrives, store it at the location pointed to by the input pointer > and advance the pointer*. When you want an output, advance the output > pointer* and take the output from the new location. Although it's possible > to detect a full buffer, needn't be concerned because that's a failure in > your application. > > *The pointers must be advanced modulo N (N is the size of the buffer) so > they will wrap around. Then N is a power of two and the beginning of the > buffer is properly located in memory, MOD is simply done by masking. > > Jerry > -- > Engineering is the art of making what you want from things you can get. > �����������������������������������������������������������������������Thank you Jerry. It's some mathematics like you explained, I believe it is so. How do I systematically derive these two pointers? You may be aware that in communication systems, the data are written/read in consecutive frames, instead of data seperated by blanks at the start of the operation. My frame have 10000 data, which are written into the memory at fixed intervals, and when reading, the blanks (or the initial contents) of the memory must be skipped I guess (still scratching head due to the ambiguous documents). Plus, it's inter-frame interleaving. Easy to understand, but difficult to get the numbers right.
Reply by ●March 22, 20072007-03-22
news reader wrote: ...> Thank you Jerry. > It's some mathematics like you explained, I believe it is so. > How do I systematically derive these two pointers?You don't derive the pointers, you specify them. For illustration, assume that your buffer is 64K address units and it starts at memory address Base_Addr = XXX....XX 0000 0000. Start with inpt = outpt = 0 and read memory with Base_Addr + outpt; write it with Base_Addr + intpt. Increment a pointer with, e.g., {inptr = (1 + inptr) AND 0xffff}> You may be aware that in communication systems, the data are written/read in > consecutive > frames, instead of data seperated by blanks at the start of the operation.The format of the data is immaterial. This isn't about what to put into the shift register, it's about how to make one.> My frame have 10000 data, which are written into the memory at fixed > intervals, and > when reading, the blanks (or the initial contents) of the memory must be > skipped I guess > (still scratching head due to the ambiguous documents). Plus, it's > inter-frame interleaving.So do you want two shift registers, the data going to each alternately?> Easy to understand, but difficult to get the numbers right.Break out what needs to be done as identifiable tasks, then implement and test them one at a time. Jerry -- Engineering is the art of making what you want from things you can get. ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯
Reply by ●March 23, 20072007-03-23
On Mar 22, 11:49 am, "news reader" <newsrea...@google.com> wrote:> "Jerry Avins" <j...@ieee.org> wrote in message > > news:PaadnWxXn6zmBp_bnZ2dnUVZ_oupnZ2d@rcn.net... > > > > > > > news reader wrote: > >> "Jerry Avins" <j...@ieee.org> wrote in message > >>news:Ec2dnbeDEsmiD5_bnZ2dnUVZ_hzinZ2d@rcn.net... > >>> news reader wrote: > >>>> My interleaver uses 50 branches and the delay units are > >>>> each 100*n (0<=3Dn<50) data. Large memory crequirement > >>>> makes shift register implementation inhibitive. > > >>>> With a single port RAM to hold the data, are there standard > >>>> and well-known routine to generate read and write addresses? > >>> Standard circular buffer code? > > >> Don't understand, Standard circular buffer code? > > >> Is it a very simple mathematics I haven't grasped yet? > >> Or is it more abscure trick like bits-reversal in FFT algorithms? > > > Keep two pointers, one for where to put input and one for where to take > > output. When they are the same, the "shift register" is empty. When an > > input arrives, store it at the location pointed to by the input pointer > > and advance the pointer*. When you want an output, advance the output > > pointer* and take the output from the new location. Although it's possi=ble> > to detect a full buffer, needn't be concerned because that's a failure =in> > your application. > > > *The pointers must be advanced modulo N (N is the size of the buffer) so > > they will wrap around. Then N is a power of two and the beginning of the > > buffer is properly located in memory, MOD is simply done by masking. > > > Jerry > > -- > > Engineering is the art of making what you want from things you can get. > > =AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF==AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF= =AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF=AF> > Thank you Jerry. > It's some mathematics like you explained, I believe it is so. > How do I systematically derive these two pointers? > > You may be aware that in communication systems, the data are written/read=in> consecutive > frames, instead of data seperated by blanks at the start of the operation. > > My frame have 10000 data, which are written into the memory at fixed > intervals, and > when reading, the blanks (or the initial contents) of the memory must be > skipped I guess > (still scratching head due to the ambiguous documents). Plus, it's > inter-frame interleaving. > > Easy to understand, but difficult to get the numbers right.- Hide quoted =text -> > - Show quoted text -What I'm getting from this is that you do hardware but not computer programming. If I'm wrong, tell us the programming language with which you are familiar and someone can give you a snippet to demonstrate the technique, complete with interleaving. Otherwise, you'll probably do better to talk to a local SW guy about circular and ring buffers. Regards, Ken Asbury
Reply by ●March 23, 20072007-03-23
Thank you for the pointer. I am designing in VHDL for logic synthesis. I think I will google for ring and circular buffer. "Ken Asbury" <avoidingspam2001@yahoo.com> wrote in message news:1174653835.213359.32350@n76g2000hsh.googlegroups.com...> - Show quoted text -What I'm getting from this is that you do hardware but not computer programming. If I'm wrong, tell us the programming language with which you are familiar and someone can give you a snippet to demonstrate the technique, complete with interleaving. Otherwise, you'll probably do better to talk to a local SW guy about circular and ring buffers. Regards, Ken Asbury
Reply by ●March 23, 20072007-03-23
On Mar 23, 9:22 am, "news reader" <newsrea...@google.com> wrote:> Thank you for the pointer. > > I am designing in VHDL for logic synthesis. > I think I will google for ring and circular buffer. > > "Ken Asbury" <avoidingspam2...@yahoo.com> wrote in message ><snip> Not to overstate the obvious, but this is neither a VHDL nor a basic programming group. Just as you don't exect to learn to drive from reading a book about "Tips For Racing Car Drivers", so this is not the place to learn elementary programming. This is not to say that I don't admire your ambition. Wishing you the best of luck in your endeavors, Ken
