Sigma-Delta A/D Converter

Hi,

In Oversampled Sigma-Delta A/D Converter, which is in the demo, why
did they use three  decimators (4*4*4) rather than one decimator of
64? Is there any particular theory behind  this for the gradual
process of decimation?

nanimerc@yahoo.com wrote:
> Hi,
> 
> In Oversampled Sigma-Delta A/D Converter, which is in the demo, why
> did they use three  decimators (4*4*4) rather than one decimator of
> 64? Is there any particular theory behind  this for the gradual
> process of decimation?
> 
Which demo?

Decimating by four, then four, then four again requires storing 11 past 
values rather than 63, and has each stage running successively slower 
which eases the timing requirements considerably.

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Posting from Google?  See http://cfaj.freeshell.org/google/

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" gives you just what it says.
See details at http://www.wescottdesign.com/actfes/actfes.html

nanimerc@yahoo.com wrote:
> Hi,
> 
> In Oversampled Sigma-Delta A/D Converter, which is in the demo, why
> did they use three  decimators (4*4*4) rather than one decimator of
> 64? Is there any particular theory behind  this for the gradual
> process of decimation?

Analyze how sharp the filters need to be for each plan.  Remember: 
aliases that appear only in the part of the spectrum that will later be 
filtered are allowed.

Jerry
-- 
Engineering is the art of making what you want from things you can get.
¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯

nanimerc@yahoo.com wrote:

> In Oversampled Sigma-Delta A/D Converter, which is in the demo, why
> did they use three  decimators (4*4*4) rather than one decimator of
> 64? Is there any particular theory behind  this for the gradual
> process of decimation?

Cascaded decimator is efficient: it requires at the order of N*log(N) 
operations per output sample, whereas the direct decimation takes about 
N^2. This is the same divide and conquer principle, as in the FFT.

Vladimir Vassilevsky

DSP and Mixed Signal Design Consultant

http://www.abvolt.com

Jerry Avins wrote:
> nanimerc@yahoo.com wrote:
>> Hi,
>>
>> In Oversampled Sigma-Delta A/D Converter, which is in the demo, why
>> did they use three  decimators (4*4*4) rather than one decimator of
>> 64? Is there any particular theory behind  this for the gradual
>> process of decimation?
> 
> Analyze how sharp the filters need to be for each plan.  Remember: 
> aliases that appear only in the part of the spectrum that will later be 
> filtered are allowed.
> 
> Jerry

In other words, if the cutoff frequency of all three filters starts at 
the same absolute frequency (in Hz), the first stages can be quite a bit 
more relaxed that subsequent stages.  They only have to knock down the 
frequencies before they alias into the final band of interest.  This 
makes them far less burdensome computationally.  The last stage will 
need some steep skirts, but it will operate at 1/16th the original 
sample rate.

-- 
Jim Thomas            Principal Applications Engineer  Bittware, Inc
jthomas@bittware.com  http://www.bittware.com    (603) 226-0404 x536
The real fun of living wisely is that you get to be smug about it. - Hobbes

On 30 Apr, 19:41, Tim Wescott <t...@seemywebsite.com> wrote:
> nanim...@yahoo.com wrote:
> > Hi,
>
> > In OversampledSigma-DeltaA/DConverter, which is in the demo, why
> > did they use three  decimators (4*4*4) rather than one decimator of
> > 64? Is there any particular theory behind  this for the gradual
> > process of decimation?
>
> Which demo?
>
> Decimating by four, then four, then four again requires storing 11 past
> values rather than 63, and has each stage running successively slower
> which eases the timing requirements considerably.
>
> --
>
> Tim Wescott
> Wescott Design Serviceshttp://www.wescottdesign.com
>
> Posting from Google?  Seehttp://cfaj.freeshell.org/google/
>
> Do you need to implement control loops in software?
> "Applied Control Theory for Embedded Systems" gives you just what it says.
> See details athttp://www.wescottdesign.com/actfes/actfes.html

Thank you for the reply,
the demo is in MATLAB/SIMULINK.