Hi,all Today I see the following over the Internet. "Digital signal controllers (DSCs) are a new class of processor that combines the best attributes of MCUs and DSPs. Like MCUs, DSCs have fast interrupt responses, offer control-oriented peripherals such as pulse-width modulators and watchdog timers, and are programmed in C. They also incorporate DSP features such as single- cycle multiply-accumulate (MAC) units, barrel shifters and large accumulators. " I don't understand the fast interrupt response is the attribute of MCUs, not of DSPs. Do some architectural feature prevent DSPs from fast interrupt response. Thanks Jogging
Digital signal controllers
Started by ●October 15, 2007
Reply by ●October 15, 20072007-10-15
On Mon, 15 Oct 2007 05:52:54 +0000, joggingsong wrote:> Hi,all > > Today I see the following over the Internet. > "Digital signal controllers (DSCs) are a new class of processor that > combines the best attributes of MCUs and DSPs. > > Like MCUs, DSCs have fast interrupt responses, offer control-oriented > peripherals such as pulse-width modulators and watchdog timers, and > are programmed in C. They also incorporate DSP features such as single- > cycle multiply-accumulate (MAC) units, barrel shifters and large > accumulators. " > > I don't understand the fast interrupt response is the attribute of > MCUs, not of DSPs. Do some architectural feature > prevent DSPs from fast interrupt response. > > Thanks > JoggingI suspect that it's one manufacturer's spin on things. I've used a few of the 'old style' DSP chips and the 'new style' chips with the melded DSP/MCU features. The new style chips (which, by the way, are available from all of the Big Three DSP manufacturers) are a much better fit for C and C++ than the older chips. Interrupt latency is another kettle of fish. Like everything else, the 'new style' chips have interrupt latencies that are all over the map, the interrupt latency issue is clouded by the time to execute an interrupt vs. the time to do a full C context save vs. the gyrations your RTOS needs to undertake to do a task switch (at least one of the older DSP's had multiple hardware stacks that rendered a full RTOS-style context switch impossible). All I can say is that you can't use sweeping generalizations -- instead, you have to evaluate each chip on a case-by-case basis, and if you're programming in C you have to check what the different compilers do, if you really want to know. -- Tim Wescott Control systems and communications consulting http://www.wescottdesign.com Need to learn how to apply control theory in your embedded system? "Applied Control Theory for Embedded Systems" by Tim Wescott Elsevier/Newnes, http://www.wescottdesign.com/actfes/actfes.html
Reply by ●October 16, 20072007-10-16
On Oct 15, 11:56 pm, Tim Wescott <t...@seemywebsite.com> wrote:> On Mon, 15 Oct 2007 05:52:54 +0000, joggingsong wrote: > > Hi,all > > > Today I see the following over the Internet. > > "Digital signal controllers (DSCs) are a new class of processor that > > combines the best attributes of MCUs and DSPs. > > > Like MCUs, DSCs have fast interrupt responses, offer control-oriented > > peripherals such as pulse-width modulators and watchdog timers, and > > are programmed in C. They also incorporate DSP features such as single- > > cycle multiply-accumulate (MAC) units, barrel shifters and large > > accumulators. " > > > I don't understand the fast interrupt response is the attribute of > > MCUs, not of DSPs. Do some architectural feature > > prevent DSPs from fast interrupt response. > > > Thanks > > Jogging > > I suspect that it's one manufacturer's spin on things. I've used a few of > the 'old style' DSP chips and the 'new style' chips with the melded > DSP/MCU features. The new style chips (which, by the way, are available > from all of the Big Three DSP manufacturers) are a much better fit for C > and C++ than the older chips.Thanks, Tim. From my experience, I have developed video codecs on BSP-15 from Equator, Blackfin 561 from ADI, and MSC8144 from Freescale. In your opinion, are these chips 'odl style' DSP chips or 'new style' chips? I use the same methods to programming on them. First, get C souce code that can be compiled on the chip. Secodn profile the code. Third, rewrite the time-consuming code into assembly code. Last, DMA is used to reduce the latency of memory access. C compiler is not an important factor in my work. Is it important for driver programmer? Jogging> > Interrupt latency is another kettle of fish. Like everything else, the > 'new style' chips have interrupt latencies that are all over the map, the > interrupt latency issue is clouded by the time to execute an interrupt vs. > the time to do a full C context save vs. the gyrations your RTOS needs to > undertake to do a task switch (at least one of the older DSP's had > multiple hardware stacks that rendered a full RTOS-style context switch > impossible). > > All I can say is that you can't use sweeping generalizations -- instead, > you have to evaluate each chip on a case-by-case basis, and if you're > programming in C you have to check what the different compilers do, if you > really want to know. > > -- > Tim Wescott > Control systems and communications consultinghttp://www.wescottdesign.com > > Need to learn how to apply control theory in your embedded system? > "Applied Control Theory for Embedded Systems" by Tim Wescott > Elsevier/Newnes,http://www.wescottdesign.com/actfes/actfes.html
Reply by ●October 16, 20072007-10-16
On Tue, 16 Oct 2007 03:14:36 +0000, joggingsong wrote:> On Oct 15, 11:56 pm, Tim Wescott <t...@seemywebsite.com> wrote: >> On Mon, 15 Oct 2007 05:52:54 +0000, joggingsong wrote: >> > Hi,all >> >> > Today I see the following over the Internet. >> > "Digital signal controllers (DSCs) are a new class of processor that >> > combines the best attributes of MCUs and DSPs. >> >> > Like MCUs, DSCs have fast interrupt responses, offer control-oriented >> > peripherals such as pulse-width modulators and watchdog timers, and >> > are programmed in C. They also incorporate DSP features such as single- >> > cycle multiply-accumulate (MAC) units, barrel shifters and large >> > accumulators. " >> >> > I don't understand the fast interrupt response is the attribute of >> > MCUs, not of DSPs. Do some architectural feature >> > prevent DSPs from fast interrupt response. >> >> > Thanks >> > Jogging >> >> I suspect that it's one manufacturer's spin on things. I've used a few of >> the 'old style' DSP chips and the 'new style' chips with the melded >> DSP/MCU features. The new style chips (which, by the way, are available >> from all of the Big Three DSP manufacturers) are a much better fit for C >> and C++ than the older chips. > > Thanks, Tim. > From my experience, I have developed video codecs on BSP-15 from > Equator, Blackfin 561 from ADI, and MSC8144 > from Freescale. In your opinion, are these chips 'odl style' DSP chips > or 'new style' chips? I use the same > methods to programming on them. First, get C souce code that can be > compiled on the chip. Secodn profile the code. > Third, rewrite the time-consuming code into assembly code. Last, DMA > is used to reduce the latency of memory access. > C compiler is not an important factor in my work. Is it important for > driver programmer? >Of the chips you mention I'm only familiar with the Blackfin, which is what I'd call 'new-style'. Your approach is sound. I've only ever used DSP chips for motion control and signal conditioning from sensors. In these cases we have a big network of processors in which the DSP has to play well, and the DSP has to do it's signal processing job, too. For these applications the code that talks on the network is written in C or C++, and the code that does the signal processing is some highly optimized assembly code that is wrapped with C or C++ APIs so the bulk of the software engineers using it don't have to understand the assembly code. -- Tim Wescott Control systems and communications consulting http://www.wescottdesign.com Need to learn how to apply control theory in your embedded system? "Applied Control Theory for Embedded Systems" by Tim Wescott Elsevier/Newnes, http://www.wescottdesign.com/actfes/actfes.html
Reply by ●October 16, 20072007-10-16
On Oct 16, 1:01 pm, Tim Wescott <t...@seemywebsite.com> wrote:> On Tue, 16 Oct 2007 03:14:36 +0000, joggingsong wrote: > > On Oct 15, 11:56 pm, Tim Wescott <t...@seemywebsite.com> wrote: > >> On Mon, 15 Oct 2007 05:52:54 +0000, joggingsong wrote: > >> > Hi,all > > >> > Today I see the following over the Internet. > >> > "Digital signal controllers (DSCs) are a new class of processor that > >> > combines the best attributes of MCUs and DSPs. > > >> > Like MCUs, DSCs have fast interrupt responses, offer control-oriented > >> > peripherals such as pulse-width modulators and watchdog timers, and > >> > are programmed in C. They also incorporate DSP features such as single- > >> > cycle multiply-accumulate (MAC) units, barrel shifters and large > >> > accumulators. " > > >> > I don't understand the fast interrupt response is the attribute of > >> > MCUs, not of DSPs. Do some architectural feature > >> > prevent DSPs from fast interrupt response. > > >> > Thanks > >> > Jogging > > >> I suspect that it's one manufacturer's spin on things. I've used a few of > >> the 'old style' DSP chips and the 'new style' chips with the melded > >> DSP/MCU features. The new style chips (which, by the way, are available > >> from all of the Big Three DSP manufacturers) are a much better fit for C > >> and C++ than the older chips. > > > Thanks, Tim. > > From my experience, I have developed video codecs on BSP-15 from > > Equator, Blackfin 561 from ADI, and MSC8144 > > from Freescale. In your opinion, are these chips 'odl style' DSP chips > > or 'new style' chips? I use the same > > methods to programming on them. First, get C souce code that can be > > compiled on the chip. Secodn profile the code. > > Third, rewrite the time-consuming code into assembly code. Last, DMA > > is used to reduce the latency of memory access. > > C compiler is not an important factor in my work. Is it important for > > driver programmer? > > Of the chips you mention I'm only familiar with the Blackfin, which is > what I'd call 'new-style'.The performance of C code is improved, maybe because the C compile is smarter than before or the new architectural features are added. For blackfin, ADI says " Based on the Micro Signal Architecture (MSA) jointly developed with Intel Corporation, Blackfin Processors combine a 32-bit RISC-like instruction set and dual 16-bit multiply accumulate (MAC) signal processing functionality with the ease-of-use attributes found in general-purpose microcontrollers." But I don't understand it. Why does it say blackfin has 32-bit RISC- like instruction set? What is the the ease-of-use attributes in general-purpose microcontrollers? jogging> > Your approach is sound. > > I've only ever used DSP chips for motion control and signal conditioning > from sensors. In these cases we have a big network of processors in which > the DSP has to play well, and the DSP has to do it's signal processing > job, too. For these applications the code that talks on the network is > written in C or C++, and the code that does the signal processing is some > highly optimized assembly code that is wrapped with C or C++ APIs so the > bulk of the software engineers using it don't have to understand the > assembly code. > > -- > Tim Wescott > Control systems and communications consultinghttp://www.wescottdesign.com > > Need to learn how to apply control theory in your embedded system? > "Applied Control Theory for Embedded Systems" by Tim Wescott > Elsevier/Newnes,http://www.wescottdesign.com/actfes/actfes.html
Reply by ●October 16, 20072007-10-16
joggingsong@gmail.com wrote: ...> For blackfin, ADI says > " Based on the Micro Signal Architecture (MSA) jointly developed > with Intel Corporation, Blackfin Processors combine a 32-bit RISC-like > instruction set and dual 16-bit multiply accumulate (MAC) signal > processing functionality with the ease-of-use attributes found in > general-purpose microcontrollers." > But I don't understand it. Why does it say blackfin has 32-bit RISC- > like instruction set? What is the the ease-of-use attributes in > general-purpose microcontrollers?Why not ask ADI? They have a helpful customer-support staff. ... Jerry -- Engineering is the art of making what you want from things you can get. ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯
Reply by ●October 16, 20072007-10-16
joggingsong@gmail.com wrote:>>>>>"Digital signal controllers (DSCs) are a new class of processor that >>>>>combines the best attributes of MCUs and DSPs. >> >>>>>Like MCUs, DSCs have fast interrupt responses, offer control-oriented >>>>>peripherals such as pulse-width modulators and watchdog timers, and >>>>>are programmed in C. They also incorporate DSP features such as single- >>>>>cycle multiply-accumulate (MAC) units, barrel shifters and large >>>>>accumulators. " >> > The performance of C code is improved, maybe because the C compile > is smarter than before or the new architectural features are added. > For blackfin, ADI says > " Based on the Micro Signal Architecture (MSA) jointly developed > with Intel Corporation, Blackfin Processors combine a 32-bit RISC-like > instruction set and dual 16-bit multiply accumulate (MAC) signal > processing functionality with the ease-of-use attributes found in > general-purpose microcontrollers."I am curious of why do you care about that marketing spew?> But I don't understand it. Why does it say blackfin has 32-bit RISC- > like instruction set? What is the the ease-of-use attributes in > general-purpose microcontrollers?What they meant are the standard stack frames and the base index addressing. The early DSPs didn't have that so the C code was a nightmare. Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com
Reply by ●October 16, 20072007-10-16
On Tue, 16 Oct 2007 14:00:25 +0000, joggingsong wrote:> On Oct 16, 1:01 pm, Tim Wescott <t...@seemywebsite.com> wrote: >> On Tue, 16 Oct 2007 03:14:36 +0000, joggingsong wrote: >> > On Oct 15, 11:56 pm, Tim Wescott <t...@seemywebsite.com> wrote: >> >> On Mon, 15 Oct 2007 05:52:54 +0000, joggingsong wrote: >> >> > Hi,all >> >> >> > Today I see the following over the Internet. >> >> > "Digital signal controllers (DSCs) are a new class of processor that >> >> > combines the best attributes of MCUs and DSPs. >> >> >> > Like MCUs, DSCs have fast interrupt responses, offer control-oriented >> >> > peripherals such as pulse-width modulators and watchdog timers, and >> >> > are programmed in C. They also incorporate DSP features such as single- >> >> > cycle multiply-accumulate (MAC) units, barrel shifters and large >> >> > accumulators. " >> >> >> > I don't understand the fast interrupt response is the attribute of >> >> > MCUs, not of DSPs. Do some architectural feature >> >> > prevent DSPs from fast interrupt response. >> >> >> > Thanks >> >> > Jogging >> >> >> I suspect that it's one manufacturer's spin on things. I've used a few of >> >> the 'old style' DSP chips and the 'new style' chips with the melded >> >> DSP/MCU features. The new style chips (which, by the way, are available >> >> from all of the Big Three DSP manufacturers) are a much better fit for C >> >> and C++ than the older chips. >> >> > Thanks, Tim. >> > From my experience, I have developed video codecs on BSP-15 from >> > Equator, Blackfin 561 from ADI, and MSC8144 >> > from Freescale. In your opinion, are these chips 'odl style' DSP chips >> > or 'new style' chips? I use the same >> > methods to programming on them. First, get C souce code that can be >> > compiled on the chip. Secodn profile the code. >> > Third, rewrite the time-consuming code into assembly code. Last, DMA >> > is used to reduce the latency of memory access. >> > C compiler is not an important factor in my work. Is it important for >> > driver programmer? >> >> Of the chips you mention I'm only familiar with the Blackfin, which is >> what I'd call 'new-style'. > The performance of C code is improved, maybe because the C compile > is smarter than before or the new architectural features are added. > For blackfin, ADI says > " Based on the Micro Signal Architecture (MSA) jointly developed > with Intel Corporation, Blackfin Processors combine a 32-bit RISC-like > instruction set and dual 16-bit multiply accumulate (MAC) signal > processing functionality with the ease-of-use attributes found in > general-purpose microcontrollers." > But I don't understand it. Why does it say blackfin has 32-bit RISC- > like instruction set? What is the the ease-of-use attributes in > general-purpose microcontrollers? >Try to write optimized assembly code for the ADSP-21xx series, and you'll understand. It has a dozen registers that span four or five sets of special features, but each register has it's own unique combination of special features that it supports. So you'll be coding along and find that the register you thought was a fine scratch-pad is suddenly absolutely necessary for a quick barrel-shift -- this will require you to step back ten or twenty lines in your assembly code and choose a _different_ register to use for that scratch pad, hoping all the while that _it_ won't be needed down the road. You can write screaming-fast assembly code for the '21xx, but you can't write it screamingly fast. Contrast that with the TI 320F2812, which is what we used next. It's register set is mostly orthogonal -- the only special purpose registers are the extended accumulator, so it's _much_ easier to write assembly for (or to optimize compilation). I suspect the Blackfin is in the same class with the '2812, unlike the '21xx. -- Tim Wescott Control systems and communications consulting http://www.wescottdesign.com Need to learn how to apply control theory in your embedded system? "Applied Control Theory for Embedded Systems" by Tim Wescott Elsevier/Newnes, http://www.wescottdesign.com/actfes/actfes.html
Reply by ●October 16, 20072007-10-16
On Oct 16, 10:39 pm, Tim Wescott <t...@seemywebsite.com> wrote:> On Tue, 16 Oct 2007 14:00:25 +0000, joggingsong wrote: > > On Oct 16, 1:01 pm, Tim Wescott <t...@seemywebsite.com> wrote: > >> On Tue, 16 Oct 2007 03:14:36 +0000, joggingsong wrote: > >> > On Oct 15, 11:56 pm, Tim Wescott <t...@seemywebsite.com> wrote: > >> >> On Mon, 15 Oct 2007 05:52:54 +0000, joggingsong wrote: > >> >> > Hi,all > > >> >> > Today I see the following over the Internet. > >> >> > "Digital signal controllers (DSCs) are a new class of processor that > >> >> > combines the best attributes of MCUs and DSPs. > > >> >> > Like MCUs, DSCs have fast interrupt responses, offer control-oriented > >> >> > peripherals such as pulse-width modulators and watchdog timers, and > >> >> > are programmed in C. They also incorporate DSP features such as single- > >> >> > cycle multiply-accumulate (MAC) units, barrel shifters and large > >> >> > accumulators. " > > >> >> > I don't understand the fast interrupt response is the attribute of > >> >> > MCUs, not of DSPs. Do some architectural feature > >> >> > prevent DSPs from fast interrupt response. > > >> >> > Thanks > >> >> > Jogging > > >> >> I suspect that it's one manufacturer's spin on things. I've used a few of > >> >> the 'old style' DSP chips and the 'new style' chips with the melded > >> >> DSP/MCU features. The new style chips (which, by the way, are available > >> >> from all of the Big Three DSP manufacturers) are a much better fit for C > >> >> and C++ than the older chips. > > >> > Thanks, Tim. > >> > From my experience, I have developed video codecs on BSP-15 from > >> > Equator, Blackfin 561 from ADI, and MSC8144 > >> > from Freescale. In your opinion, are these chips 'odl style' DSP chips > >> > or 'new style' chips? I use the same > >> > methods to programming on them. First, get C souce code that can be > >> > compiled on the chip. Secodn profile the code. > >> > Third, rewrite the time-consuming code into assembly code. Last, DMA > >> > is used to reduce the latency of memory access. > >> > C compiler is not an important factor in my work. Is it important for > >> > driver programmer? > > >> Of the chips you mention I'm only familiar with the Blackfin, which is > >> what I'd call 'new-style'. > > The performance of C code is improved, maybe because the C compile > > is smarter than before or the new architectural features are added. > > For blackfin, ADI says > > " Based on the Micro Signal Architecture (MSA) jointly developed > > with Intel Corporation, Blackfin Processors combine a 32-bit RISC-like > > instruction set and dual 16-bit multiply accumulate (MAC) signal > > processing functionality with the ease-of-use attributes found in > > general-purpose microcontrollers." > > But I don't understand it. Why does it say blackfin has 32-bit RISC- > > like instruction set? What is the the ease-of-use attributes in > > general-purpose microcontrollers? > > Try to write optimized assembly code for the ADSP-21xx series, and you'll > understand. It has a dozen registers that span four or five sets of > special features, but each register has it's own unique combination of > special features that it supports. So you'll be coding along and find > that the register you thought was a fine scratch-pad is suddenly > absolutely necessary for a quick barrel-shift -- this will require you to > step back ten or twenty lines in your assembly code and choose a > _different_ register to use for that scratch pad, hoping all the while > that _it_ won't be needed down the road.My god! I heard that ADI stopped to develop SHARC and focused on blackfin, Maybe easy programming is an important factor. Jogging> > You can write screaming-fast assembly code for the '21xx, but you can't > write it screamingly fast. > > Contrast that with the TI 320F2812, which is what we used next. It's > register set is mostly orthogonal -- the only special purpose registers > are the extended accumulator, so it's _much_ easier to write assembly for > (or to optimize compilation). I suspect the Blackfin is in the same class > with the '2812, unlike the '21xx. > > -- > Tim Wescott > Control systems and communications consultinghttp://www.wescottdesign.com > > Need to learn how to apply control theory in your embedded system? > "Applied Control Theory for Embedded Systems" by Tim Wescott > Elsevier/Newnes,http://www.wescottdesign.com/actfes/actfes.html
Reply by ●October 16, 20072007-10-16
On Oct 16, 10:34 pm, Vladimir Vassilevsky <antispam_bo...@hotmail.com> wrote:> joggings...@gmail.com wrote: > >>>>>"Digital signal controllers (DSCs) are a new class of processor that > >>>>>combines the best attributes of MCUs and DSPs. > > >>>>>Like MCUs, DSCs have fast interrupt responses, offer control-oriented > >>>>>peripherals such as pulse-width modulators and watchdog timers, and > >>>>>are programmed in C. They also incorporate DSP features such as single- > >>>>>cycle multiply-accumulate (MAC) units, barrel shifters and large > >>>>>accumulators. " > > > The performance of C code is improved, maybe because the C compile > > is smarter than before or the new architectural features are added. > > For blackfin, ADI says > > " Based on the Micro Signal Architecture (MSA) jointly developed > > with Intel Corporation, Blackfin Processors combine a 32-bit RISC-like > > instruction set and dual 16-bit multiply accumulate (MAC) signal > > processing functionality with the ease-of-use attributes found in > > general-purpose microcontrollers." > > I am curious of why do you care about that marketing spew? > > > But I don't understand it. Why does it say blackfin has 32-bit RISC- > > like instruction set? What is the the ease-of-use attributes in > > general-purpose microcontrollers? > > What they meant are the standard stack frames and the base index > addressing. The early DSPs didn't have that so the C code was a nightmare.Vladimir, could you tell me about standard stack frames? I have seen it ever but haven't a deep understanding. Thanks Jogging> > Vladimir Vassilevsky > DSP and Mixed Signal Design Consultanthttp://www.abvolt.com
