On Mar 13, 9:44 am, Darrell <darrel...@gmail.com> wrote:> On Mar 10, 9:43 pm, Ray Andraka <r...@andraka.com> wrote: > > > I've also used it, adapted for an FPGA of course. > > Just out of curiosity, did you essentially do what Steve did to > convert the multiply to a shift? Other than that I really don't see > anything that isn't FPGA friendly. > > I have all three algorithms working (in Matlab, using the fixed point > toolbox). With the data sets I'm using, I see about a 12 dB > improvement in suppression using Robert's initial approach, and about > a 9-10 dB improvement using the Tim/Steve approach. As someone > (Robert?) observed, Steve's version is the same as Tim's, converted to > feed-forward form and using a shift for the multiply.i'm not sure who/which "Steve". Underwood?> I really like > it for a HW implementation, since you are using 1-R you get a great > selection of R values. There is nothing stopping one from doing the > same thing with Robert's version :-).actually, that's what i thought i *did* in the> I haven't had time to dig in too deeply on what is going on with the > estimate and why Robert's seems to work better. Just as an FYI, the > data set I am using has a DC that is varying slowly (by my standards!) > over time. The total error is about 16 dB above the noise floor. I'm > also modifying the R value to go from a fast attack to steady state > value (on the order of 0.995 for the initial 50 ms down to 0.9999 by > 500 ms).anyway, did you consider Tim's version as depicted in 56K code below? whether it's done as 56K code or C code or FPGA code, i don't care, but i would like to know if anyone has implemented it, side-by-side, both ways to compare if the outputs are different (hopefully not) and if there was any savings in complexity using Tim Wescott's method. "my" version: move #<sampleArray,r1 move #<parameters,r6 move #<2,n6 move #>(1.0-pole),y1 do #NUM_INPUTS,channelLoop move y:(r6)+,x0 move y:(r6)+,a move y:(r6)-n6,a0 do #BLOCK_SIZE,filterLoop sub x0,a x:(r1),x0 a,y0 add x0,a y0,x:(r1)+ mac -y1,y0,a filterLoop move x0,y:(r6)+ move a,y:(r6)+ move a0,y:(r6)+ channelLoop Tim's version: move #<sampleArray,r1 move #<parameters,r6 move #<2,n6 move #>(1.0-pole),y1 do #NUM_INPUTS,channelLoop move y:(r6)+,a ; get y[n-1] state move y:(r6)+,b ; get w[n-1] state (hi word) move y:(r6)-n6,b0 ; get w[n-1] state (lo word) do #BLOCK_SIZE,filterLoop mac -y1,y0,b x:(r1),a a,y0 ; x[n] -> a ; w[n] = w[n-1] + (1- pole)*y[n-1] ; y[n-1] -> y0 sub b,a y0,x:(r1)+ ; output y[n-1] ; a = x[n] - w[n] = y[n] ; ignore lo word of a filterLoop ; now y[n] -> y[n-1] ; w[n] -> w[n-1] implicitly move a,y:(r6)+ ; save y[n] state move b,y:(r6)+ ; save w[n] state (hi word) move b0,y:(r6)+ ; save w[n] state (lo word) channelLoop r b-j
Re: DSP Trick: Fixed Point DC Blocking Filter with Noise-Shaping
Started by ●March 7, 2008
Reply by ●March 13, 20082008-03-13
Reply by ●March 13, 20082008-03-13
On Mar 12, 8:42 am, emeb <ebromba...@gmail.com> wrote:> On Mar 7, 1:09 pm, Darrell <darrel...@gmail.com> wrote: > > > > > r b-j posted a trick back in 1999 to remove the DC of a signal, which > > I recently ran across in DSP guru. It was basically a differentiator > > followed by a leaky integrator with some tricks to remove the > > quantization noise. I was wanting to give it a try but I saw > > something in the 56K assembly code which looked incorrect. The > > original post can be found athttp://groups.google.com/group/comp.dsp/msg/9ee3ca0606fbcb27. > > > do #CHUNK_SIZE,filterLoop > > sub -x0,a x:(r1),x0 a,y0 ; > > truncated state y[n-1] -> y0, a = y[n-1] - x[n-1] > > add x0,a y0,x:(r1)+ ; > > store y[n-1] to output, a = y[n-1] - x[n-1] + x[n] > > mac > > y1,y0,a ; > > a = y[n-1] - x[n-1] + x[n] + (pole-1)*y[n-1] > > ; > > = (x[n]-x[n-1]) + pole*y[n-1] = y[n] > > filterLoop ; now > > x[n] -> x[n-1], y[n] -> y[n-1] implicitly > > Interesting. For years now I've been using a somewhat different DC > blocking structure in my chip designs. Something like this: > > - DC Estimate is subtracted from input signal > - subtracter output goes to perfect integrator where residual DC > accumulates > - Output of integrator is scaled by shifting to control loop time > constant & residual error > - Output of shifter is DC estimate which feeds back to subtracter > > Any thoughts on the comparative advantages of r b-j's approach vs this > one? > > EBOK - I did some digging and my approach is similar to "Tim's Quicker DC Blocker" as described here: http://groups.google.com/group/comp.dsp/msg/3759bc4014951a03 Tim's algo: y[n] = x[n] - Quantize{ w[n] } = x[n] - (w[n] + e[n]) w[n+1] = w[n] + (1-pole)*y[n] Mine: d[n] = x[n] - ( w[n] >>> scale ) ; note - full precision, so extend lsbs of d[n] w[n+1] = w[n] + d[n] y[n] = Quantize{ d[n] } ; just drop extra lsbs added in step 1 With no quantization or leaky integrator this seems to work fine. DC estimate doesn't decay as it does with leaky integrator, but that hasn't been a problem. EB
Reply by ●March 13, 20082008-03-13
On Thu, 13 Mar 2008 12:05:34 -0700 (PDT), emeb <ebrombaugh@gmail.com> wrote: (snipped)> >EBHello EB, In the March issue of the IEEE Sig. Processing Magazine, Randy Yates gives his description of a fixed-point DC blocker. His material is in the "DSP Tips & Tricks" column of the magazine. Regards, [-Rick-]
Reply by ●March 13, 20082008-03-13
On Thu, 13 Mar 2008 12:05:34 -0700 (PDT), emeb <ebrombaugh@gmail.com> wrote: (snipped)> >EBHello EB, In the March issue of the IEEE Sig. Processing Magazine, Randy Yates gives his description of a fixed-point DC blocker. His material is in the "DSP Tips & Tricks" column of the magazine. Regards, [-Rick-]
Reply by ●March 13, 20082008-03-13
On Thu, 13 Mar 2008 12:05:34 -0700 (PDT), emeb <ebrombaugh@gmail.com> wrote: (snipped)> >EBHello EB, In the March issue of the IEEE Sig. Processing Magazine, Randy Yates gives his description of a fixed-point DC blocker. His material is in the "DSP Tips & Tricks" column of the magazine. Regards, [-Rick-]
Reply by ●March 13, 20082008-03-13
On Thu, 13 Mar 2008 12:05:34 -0700 (PDT), emeb <ebrombaugh@gmail.com> wrote: (snipped)> >EBHello EB, In the March issue of the IEEE Sig. Processing Magazine, Randy Yates gives his description of a fixed-point DC blocker. His material is in the "DSP Tips & Tricks" column of the magazine. Regards, [-Rick-]
Reply by ●March 13, 20082008-03-13
On Thu, 13 Mar 2008 12:05:34 -0700 (PDT), emeb <ebrombaugh@gmail.com> wrote: (snipped)> >EBHello EB, In the March issue of the IEEE Sig. Processing Magazine, Randy Yates gives his description of a fixed-point DC blocker. His material is in the "DSP Tips & Tricks" column of the magazine. Regards, [-Rick-]
Reply by ●March 13, 20082008-03-13
On Thu, 13 Mar 2008 12:05:34 -0700 (PDT), emeb <ebrombaugh@gmail.com> wrote: (snipped)> >EBHello EB, In the March issue of the IEEE Sig. Processing Magazine, Randy Yates gives his description of a fixed-point DC blocker. His material is in the "DSP Tips & Tricks" column of the magazine. Regards, [-Rick-]
Reply by ●March 13, 20082008-03-13
On Thu, 13 Mar 2008 12:05:34 -0700 (PDT), emeb <ebrombaugh@gmail.com> wrote: (snipped)> >EBHello EB, In the March issue of the IEEE Sig. Processing Magazine, Randy Yates gives his description of a fixed-point DC blocker. His material is in the "DSP Tips & Tricks" column of the magazine. Regards, [-Rick-]
Reply by ●March 13, 20082008-03-13
On Mar 13, 1:09�pm, robert bristow-johnson <r...@audioimagination.com> wrote:> On Mar 13, 9:44 am, Darrell <darrel...@gmail.com> wrote: > > i'm not sure who/which "Steve". �Underwood?Yes, that is right.> > �I really like > > it for a HW implementation, since you are using 1-R you get a great > > selection of R values. �There is nothing stopping one from doing the > > same thing with Robert's version :-). > > actually, that's what i thought i *did* in theHmm...I think you left out something after "the" :-). Anyway, just to be clear I was referring to replacing the multiplier with a shifter.> anyway, did you consider Tim's version as depicted in 56K code below? > whether it's done as 56K code or C code or FPGA code, i don't care, > but i would like to know if anyone has implemented it, side-by-side, > both ways to compare if the outputs are different (hopefully not) and > if there was any savings in complexity using Tim Wescott's method. > > <snip code>I did not look at the 56K code of Tim's algorithm, I made the dangerous assumption it was the same as the difference equation he implemented. I did implement the original difference equation in Matlab using the fixed point library, and assuming I made no errors your algorithm performed a few dB better for my data sets. I haven't done any z-domain algebra to figure out if the transfer functions are the same between your original algorithm and Tim's version, but your comment seems to imply you think they are. Hopefully I will have more time to work on this in the next day or two. Darrell
