Hi all,
I would like to have some help from you in this topic.
I have converted a 12.1MHz analog IF signal to baseband using an
105MSPS ADC and a Virtex-4 FPGA. But I'm getting a DC offset of about
20% of peak to peak value.
The BW of the Signal is 200 KHz.
What is the best method of DC offset Cancellation??
Can I do averaging over a period of time and subtract the average or
can I use a High Pass Filter??
If averaging is the correct way, How long I should average??
thanks in advance
Rudheesh
DC Offset Cancellation in Digital Baseband
Started by ●April 28, 2008
Reply by ●April 28, 20082008-04-28
On Apr 28, 6:08�pm, Rudheesh Raghav <rudhees...@gmail.com> wrote:> Hi all, > > � � � � �I would like to have some help from you in this topic. > > I have converted a 12.1MHz analog IF signal to baseband using an > 105MSPS ADC and a Virtex-4 FPGA. But I'm getting a DC offset of about > 20% of peak to peak value. > > The BW of the Signal is 200 KHz. > > What is the best method of DC offset Cancellation?? > > Can I do averaging over a period of time and subtract the average or > can I use a High Pass Filter?? > > If averaging is the correct way, How long I should average?? > > � � � � � � � � � � � � � � � � �thanks in advance > > RudheeshHow are you doing your freq/phase locking for the mixing down to baseband?
Reply by ●April 28, 20082008-04-28
Rudheesh Raghav wrote:> Hi all, > > I would like to have some help from you in this topic. > > I have converted a 12.1MHz analog IF signal to baseband using an > 105MSPS ADC and a Virtex-4 FPGA. But I'm getting a DC offset of about > 20% of peak to peak value. > > The BW of the Signal is 200 KHz. > > What is the best method of DC offset Cancellation?? > > Can I do averaging over a period of time and subtract the average or > can I use a High Pass Filter?? > > If averaging is the correct way, How long I should average?? > > thanks in advance > > > Rudheesh >Subtracting the average, on a running basis, is a specific high-pass filter. It depends on why the DC offset is there how well calculating a constant for an initial window and then subtracting it from all subsequent samples will work. Without a known cause, I would suggest a high-pass filter. actually there was a recent post about this on dsprelated.com (http://www.dsprelated.com/showarticle/58.php). J. Elms
Reply by ●April 28, 20082008-04-28
On Apr 29, 4:34�am, J Elms <jeffrey.e...@gatech.edu> wrote:> Rudheesh Raghav wrote: > > Hi all, > > > � � � � �I would like to have some help from you in this topic. > > > I have converted a 12.1MHz analog IF signal to baseband using an > > 105MSPS ADC and a Virtex-4 FPGA. But I'm getting a DC offset of about > > 20% of peak to peak value. > > > The BW of the Signal is 200 KHz. > > > What is the best method of DC offset Cancellation?? > > > Can I do averaging over a period of time and subtract the average or > > can I use a High Pass Filter?? > > > If averaging is the correct way, How long I should average?? > > > � � � � � � � � � � � � � � � � �thanks in advance > > > Rudheesh > > Subtracting the average, on a running basis, is a specific high-pass > filter. > > It depends on why the DC offset is there how well calculating a constant > for an initial window and then subtracting it from all subsequent > samples will work. > > Without a known cause, I would suggest a high-pass filter. �actually > there was a recent post about this on dsprelated.com > (http://www.dsprelated.com/showarticle/58.php). > > J. ElmsHi Elms, Thank you for the reply... The article has helped..
Reply by ●April 28, 20082008-04-28
On Apr 29, 4:15�am, c...@claysturner.com wrote:> On Apr 28, 6:08�pm, Rudheesh Raghav <rudhees...@gmail.com> wrote: > > > > > Hi all, > > > � � � � �I would like to have some help from you in this topic. > > > I have converted a 12.1MHz analog IF signal to baseband using an > > 105MSPS ADC and a Virtex-4 FPGA. But I'm getting a DC offset of about > > 20% of peak to peak value. > > > The BW of the Signal is 200 KHz. > > > What is the best method of DC offset Cancellation?? > > > Can I do averaging over a period of time and subtract the average or > > can I use a High Pass Filter?? > > > If averaging is the correct way, How long I should average?? > > > � � � � � � � � � � � � � � � � �thanks in advance > > > Rudheesh > > How are you doing your freq/phase locking for the mixing down to > baseband?There is a periodic fixed frequency carrier in the signal..I'm locking to that carrier..
Reply by ●April 29, 20082008-04-29
On Apr 29, 5:20 am, Rudheesh Raghav <rudhees...@gmail.com> wrote:> On Apr 29, 4:34 am, J Elms <jeffrey.e...@gatech.edu> wrote: > > > > > Rudheesh Raghav wrote: > > > Hi all, > > > > I would like to have some help from you in this topic. > > > > I have converted a 12.1MHz analog IF signal to baseband using an > > > 105MSPS ADC and a Virtex-4 FPGA. But I'm getting a DC offset of about > > > 20% of peak to peak value. > > > > The BW of the Signal is 200 KHz. > > > > What is the best method of DC offset Cancellation?? > > > > Can I do averaging over a period of time and subtract the average or > > > can I use a High Pass Filter?? > > > > If averaging is the correct way, How long I should average?? > > > > thanks in advance > > > > Rudheesh > > > Subtracting the average, on a running basis, is a specific high-pass > > filter. > > > It depends on why the DC offset is there how well calculating a constant > > for an initial window and then subtracting it from all subsequent > > samples will work. > > > Without a known cause, I would suggest a high-pass filter. actually > > there was a recent post about this on dsprelated.com > > (http://www.dsprelated.com/showarticle/58.php). > > > J. Elms > > Hi Elms, > > Thank you for the reply... The article has helped..Just to provide more reference: You may also look at a brief write-up on digital RC low pass filter. http://www.dsplog.com/2007/12/02/digital-implementation-of-rc-low-pass-filter/ Thanks, Krishna ~blogs @ http://www.dsplog.com
Reply by ●April 29, 20082008-04-29
>Hi all, > > I would like to have some help from you in this topic. > >I have converted a 12.1MHz analog IF signal to baseband using an >105MSPS ADC and a Virtex-4 FPGA. But I'm getting a DC offset of about >20% of peak to peak value. > >The BW of the Signal is 200 KHz. > >What is the best method of DC offset Cancellation?? > >Can I do averaging over a period of time and subtract the average or >can I use a High Pass Filter?? > >If averaging is the correct way, How long I should average?? > > thanks in advance > > >RudheeshOne thing that may help a bit is to AC couple the input to your ADC, if you haven't already. Mark
Reply by ●May 3, 20082008-05-03
On Mon, 28 Apr 2008 15:08:06 -0700 (PDT), Rudheesh Raghav <rudheeshrk@gmail.com> wrote:>Hi all, > > I would like to have some help from you in this topic. > >I have converted a 12.1MHz analog IF signal to baseband using an >105MSPS ADC and a Virtex-4 FPGA. But I'm getting a DC offset of about >20% of peak to peak value. > >The BW of the Signal is 200 KHz. > >What is the best method of DC offset Cancellation?? > >Can I do averaging over a period of time and subtract the average or >can I use a High Pass Filter?? > >If averaging is the correct way, How long I should average?? > > thanks in advance > > >RudheeshHello Rudheesh, You might have a look at the "DSP Tips & Tricks" column in the March 2008 issue of the IEEE Signal Proc. magazine. That column is an article titled "DC Blocker Algorithms", written by our own Randy Yates, some other guy. Perhaps it'll be of some use to you. Goos Luck, [-Rick-]
Reply by ●May 4, 20082008-05-04
On May 3, 10:31 pm, Rick Lyons <R.Lyons@_BOGUS_ieee.org> wrote:> On Mon, 28 Apr 2008 15:08:06 -0700 (PDT), Rudheesh Raghav > > > > <rudhees...@gmail.com> wrote: > >Hi all, > > > I would like to have some help from you in this topic. > > >I have converted a 12.1MHz analog IF signal to baseband using an > >105MSPS ADC and a Virtex-4 FPGA. But I'm getting a DC offset of about > >20% of peak to peak value. > > >The BW of the Signal is 200 KHz. > > >What is the best method of DC offset Cancellation?? > > >Can I do averaging over a period of time and subtract the average or > >can I use a High Pass Filter?? > > >If averaging is the correct way, How long I should average?? > > > thanks in advance > > >Rudheesh > > Hello Rudheesh, > You might have a look at the "DSP Tips & Tricks" > column in the March 2008 issue of the IEEE Signal > Proc. magazine. That column is an article titled > "DC Blocker Algorithms", written by our own Randy Yates, > some other guy. Perhaps it'll be of some use to you. > > Goos Luck, > [-Rick-]Can you recommend a way to get that article without spending $13? I guess even though I am an IEEE member, I still have to pay for articles from magazines I don't subscribe to.
Reply by ●May 4, 20082008-05-04
On May 4, 7:31�am, Rick Lyons <R.Lyons@_BOGUS_ieee.org> wrote:> On Mon, 28 Apr 2008 15:08:06 -0700 (PDT), Rudheesh Raghav > > > > <rudhees...@gmail.com> wrote: > >Hi all, > > > � � � � I would like to have some help from you in this topic. > > >I have converted a 12.1MHz analog IF signal to baseband using an > >105MSPS ADC and a Virtex-4 FPGA. But I'm getting a DC offset of about > >20% of peak to peak value. > > >The BW of the Signal is 200 KHz. > > >What is the best method of DC offset Cancellation?? > > >Can I do averaging over a period of time and subtract the average or > >can I use a High Pass Filter?? > > >If averaging is the correct way, How long I should average?? > > > � � � � � � � � � � � � � � � � thanks in advance > > >Rudheesh > > Hello Rudheesh, > � �You might have a look at the "DSP Tips & Tricks" > column in the March 2008 issue of the IEEE Signal > Proc. magazine. �That column is an article titled > "DC Blocker Algorithms", written by our own Randy Yates, > some other guy. �Perhaps it'll be of some use to you. > > Goos Luck, > [-Rick-]Hi Rick, Thank you for the information. What may be the possible sources of DC Offset in a Digital Down Converter except from DC offset in the source?
