DSP vs PC CPU

I am deciding whether to use TI TMS320C6713 or Eee PC (900 MHz Intel
Celeron Processor at USD$256) on my vision processing project.

Actually how to compare the DSP processing power with conventional PC's
CPU?

Thanks!

Is your vision processing project completely running in real-time
environment? If so, you probably want to look into dedicated DSP.
Otherwise, PC is a more cost effective platform.

James
www.go-ci.com

On Sun, 11 May 2008 15:27:23 -0500, "tklau" <nackit@yahoo.com> wrote:

>I am deciding whether to use TI TMS320C6713 or Eee PC (900 MHz Intel
>Celeron Processor at USD$256) on my vision processing project.
>
>Actually how to compare the DSP processing power with conventional PC's
>CPU?
>
>Thanks!

Hi,
  the following article is several years 
old but, who knows, it may contain some 
info that useful to you. 

http://www.tmworld.com/article/CA187473.html

Good Luck,
[-Rick-]

On May 11, 4:27 pm, "tklau" <nac...@yahoo.com> wrote:
> I am deciding whether to use TI TMS320C6713 or Eee PC (900 MHz Intel
> Celeron Processor at USD$256) on my vision processing project.

You'll have trouble buying a TI eval board for the price of an EeePC,
and the price of a TI-extended JTAG pod to use with your own board is
even higher.

However, the EeePC runs the processor at a derated clock speed in the
600 MHz range.  Also you may need to think about improving the cooling
if you are going to enclose it.  But is is a very nice little machine
- bought for on the go, but actually my main PC outside of work these
days.  (With practice you really can type on it).

You should also think about where your data is coming from.  If it's a
USB camera device, with linux drivers available, the EeePC sounds a
lot simpler than getting it into an embedded DSP.   Ditto if its data
coming over ethernet.  If it's some kind of lower-level interface, the
DSP may be preferable as you'd have to hack up a USB interface to use
it with the Eee.

>I am deciding whether to use TI TMS320C6713 or Eee PC (900 MHz Intel
>Celeron Processor at USD$256) on my vision processing project.
>
>Actually how to compare the DSP processing power with conventional PC's
>CPU?

It is a difficult task to compare the two without actually implementing
your specific algorithm and comparing between them.  If the question was
only fixed-point, I'd almost always suggest a DSP chip since they typically
have multiple pipelines and general purpose CPUs usually only have one,
maybe two integer units (which are not always that efficient).  It is
different for floating-point applications, however, since most modern CPUs
have very powerful FPUs.

TI parts (floating or fixed) are quite deterministic for a given
algorithm, i.e., you can actually calculate the actual number of operations
and the total time it should take.  For general CPUs, it is not as simple. 
There's a couple threads in here about FFT algorithms, for example, that
work out in such a way that the fewest FLOPs does not always equate to the
fastest execution time.  The TI DSP parts (6713 included), also have a
tougher time working with anything double precision.  I believe the
Celerons all have 64-bit FPUs, which would undoubtedly improve their
efficiency in such cases, though they still may not be faster overall for a
variety of reasons (usually memory/cache related).

Mark

"markt" <takatz@pericle.com> writes:

>>I am deciding whether to use TI TMS320C6713 or Eee PC (900 MHz Intel
>>Celeron Processor at USD$256) on my vision processing project.
>>
>>Actually how to compare the DSP processing power with conventional PC's
>>CPU?
>
> It is a difficult task to compare the two without actually implementing
> your specific algorithm and comparing between them.  If the question was
> only fixed-point, I'd almost always suggest a DSP chip since they typically
> have multiple pipelines and general purpose CPUs usually only have one,
> maybe two integer units (which are not always that efficient).  It is
> different for floating-point applications, however, since most modern CPUs
> have very powerful FPUs.
>
> TI parts (floating or fixed) are quite deterministic for a given
> algorithm, i.e., you can actually calculate the actual number of operations
> and the total time it should take.  For general CPUs, it is not as simple. 
> There's a couple threads in here about FFT algorithms, for example, that
> work out in such a way that the fewest FLOPs does not always equate to the
> fastest execution time.  The TI DSP parts (6713 included), also have a
> tougher time working with anything double precision.  I believe the
> Celerons all have 64-bit FPUs, which would undoubtedly improve their
> efficiency in such cases, though they still may not be faster overall for a
> variety of reasons (usually memory/cache related).

Just to make the comparison even more ambivalent, I'm not sure if the
Celeron has SSE2 extensions, but if it does, you can perform accelerated
fixed-point operations on it, perhaps exceeding the fixed-point MACs/sec
of the C67x depending on the clock speeds.
-- 
%  Randy Yates                  % "My Shangri-la has gone away, fading like 
%% Fuquay-Varina, NC            %  the Beatles on 'Hey Jude'" 
%%% 919-577-9882                %  
%%%% <yates@ieee.org>           % 'Shangri-La', *A New World Record*, ELO
http://www.digitalsignallabs.com

tklau wrote:

> Actually how to compare the DSP processing power with conventional PC's
> CPU?

 From my experience, the optimized DSP code which uses the DSP native 
arithmetics runs about 3 times faster then the generic C implementation 
on PC (if referred to the same clock rate).


Vladimir Vassilevsky
DSP and Mixed Signal Design Consultant
http://www.abvolt.com

Randy Yates wrote:
> Just to make the comparison even more ambivalent, I'm not sure if the
> Celeron has SSE2 extensions, but if it does, you can perform accelerated
> fixed-point operations on it, perhaps exceeding the fixed-point MACs/sec
> of the C67x depending on the clock speeds.

SSE2 is a total pain in the ass for fixed point DSP. Whoever came with 
the MMX stuff should be spanked hard.

Floating point DSP with SSE works out far better. You still have awful 
alignment issues, though. That makes it either messy (e.g using multiple 
shifted sets of coeffs) or horribly slow (e.g. adaptive filters, where 
managing multiple shifted coeff sets eats up performance).

I've found the AMD chips far more forgiving and useful than the Intel 
ones. You have to get everything just right to get decent performance 
from the Intel chips. That said, when you get things right, no current 
purpose built DSP core can match them. On the other hand, no purpose 
built DSP core takes 100W, and needs a gail force wind to cool it.

Regards,
Steve

> From my experience, the optimized DSP code which uses the DSP native 
>arithmetics runs about 3 times faster then the generic C implementation 
>on PC (if referred to the same clock rate).

Yeah, but it is possible to get non-generic implementations on the PC that
are orders of magnitude faster than "generic C."  It requires effort,
however.  One of the leading gripes with modern FPUs is the difficulty in
getting the various instruction sets to work as efficient as they can. 
SSE/2/3 as well as the Altivec instructions (PowerPC) and even the MIPS
SIMD capability are a pain to code for without specialized assembly or the
use of VSIPL or similar packages (and VSIPL is difficult to work with,
too).

IMO, gcc just isn't capable of dealing with SIMD (yet) as it should.  When
operations are memory bound, however, gcc actually outperforms hand-coded
assembly I have found (and the resulting code is often counter-intuitive).

Mark

Steve Underwood <steveu@dis.org> writes:

> Randy Yates wrote:
>> Just to make the comparison even more ambivalent, I'm not sure if the
>> Celeron has SSE2 extensions, but if it does, you can perform accelerated
>> fixed-point operations on it, perhaps exceeding the fixed-point MACs/sec
>> of the C67x depending on the clock speeds.
>
> SSE2 is a total pain in the ass for fixed point DSP. Whoever came with
> the MMX stuff should be spanked hard.

I wouldn't say it's that bad, but it is "challenging." But heck, so is
a lot of DSP architectures. Try writing assembly for the C64x!

I found some excellent material from Agner Fog that really helped me out
on the SSE2 stuff:

  http://www.agner.org/optimize/
-- 
%  Randy Yates                  % "And all that I can do
%% Fuquay-Varina, NC            %  is say I'm sorry, 
%%% 919-577-9882                %  that's the way it goes..."
%%%% <yates@ieee.org>           % Getting To The Point', *Balance of Power*, ELO
http://www.digitalsignallabs.com